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    ELECTRONIC DEVICE HAVING INTEGRATED CIRCUIT CHIP CONNECTED TO PADS ON SUBSTRATE
    12.
    发明申请
    ELECTRONIC DEVICE HAVING INTEGRATED CIRCUIT CHIP CONNECTED TO PADS ON SUBSTRATE 有权

    公开(公告)号：US20220199514A1

    公开(公告)日：2022-06-23

    申请号：US17691135

    申请日：2022-03-10

    Applicant: InnoLux Corporation

    Inventor： Mei-Chi Hsu ,  Yu-Chin Lin ,  Yu-Ting Liu

    IPC: H01L23/498 ,  H01L23/00

    Abstract: The present disclosure provides an electronic device including a substrate, a conductive pad, a chip and an insulating layer. The conductive pad is disposed on the substrate. The chip is disposed on the conductive pad. The insulating layer is disposed between the conductive pad and the chip, wherein the insulating layer includes an opening, and the chip is electrically connected to the conductive pad through the opening. An outline of the opening includes a plurality of curved corners in a normal direction of the substrate.

    Package device
    14.
    发明授权
    Package device 有权

    公开(公告)号：US12200857B2

    公开(公告)日：2025-01-14

    申请号：US18373284

    申请日：2023-09-27

    Applicant: InnoLux Corporation

    Inventor： Yeong-E Chen ,  Cheng-En Cheng ,  Yu-Ting Liu

    IPC: H05K1/02 ,  B32B3/08 ,  B32B3/30 ,  B32B5/24 ,  B32B15/092 ,  B32B15/14 ,  B32B15/20 ,  H05K1/03 ,  H05K3/02 ,  H05K3/22 ,  H05K3/46

    Abstract: The present disclosure provides a package device including a redistribution layer. The redistribution layer includes a first dielectric layer, a conductive layer, and a second dielectric layer, and the conductive layer is disposed between the first dielectric layer and the second dielectric layer, wherein the redistribution layer has a test mark, the test mark includes a conductive pattern formed of the conductive layer, the conductive pattern includes a center portion and a plurality of extension portions, and the plurality of extension portions are respectively connected to the center portion.

    Electronic device having integrated circuit chip connected to pads on substrate
    16.
    发明授权
    Electronic device having integrated circuit chip connected to pads on substrate 有权

    公开(公告)号：US12046547B2

    公开(公告)日：2024-07-23

    申请号：US18204405

    申请日：2023-06-01

    Applicant: InnoLux Corporation

    Inventor： Mei-Chi Hsu ,  Yu-Chin Lin ,  Yu-Ting Liu

    IPC: H01L23/498 ,  H01L23/00

    CPC classification number: H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

    Abstract: The present disclosure provides an electronic device including a substrate, a first pad, an insulating layer, a second pad, a conductive element and a chip. The first pad is disposed on the substrate. The insulating layer is disposed on the first pad and has a plurality of first openings. The second pad is electrically connected to the first pad through the first openings. The conductive particle is disposed on the second pad. The chip is electrically connected to the second pad through the conductive element. In a top view of the electronic device, the first openings are arranged along a long edge of the first pad, and an outline of at least one first opening has a curved shape.

    Manufacturing method of package device
    17.
    发明授权
    Manufacturing method of package device 有权

    公开(公告)号：US11798853B2

    公开(公告)日：2023-10-24

    申请号：US17315389

    申请日：2021-05-10

    Applicant: InnoLux Corporation

    Inventor： Yeong-E Chen ,  Kuang-Chiang Huang ,  Yu-Ting Liu ,  Yi-Hung Lin ,  Cheng-En Cheng

    IPC: H01L21/66 ,  H01L23/00 ,  H01L21/48

    CPC classification number: H01L22/14 ,  H01L21/48 ,  H01L22/32 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/829

    Abstract: The present disclosure provides a manufacturing method of a package device, which includes providing a carrier substrate, a first conductive layer, and a release layer, where the carrier substrate has a device region and a peripheral region, and the first conductive layer and the release layer are disposed on the carrier substrate. The method further includes forming a second conductive layer on the release layer in the device region, where at least one of the first and second conductive layers includes a first pad in the peripheral region. The second conductive layer includes a second pad electrically connected to the first pad through the first conductive layer. The method also includes performing an inspection step to provide an input signal to one of the first and second pads, and to receive an output signal from another of the first and second pads.

    Package device
    18.
    发明授权
    Package device 有权

    公开(公告)号：US11776914B2

    公开(公告)日：2023-10-03

    申请号：US17845991

    申请日：2022-06-21

    Applicant: InnoLux Corporation

    Inventor： Yeong-E Chen ,  Cheng-En Cheng ,  Yu-Ting Liu

    IPC: H01L23/538 ,  H01L21/768 ,  H01L21/66

    CPC classification number: H01L23/5384 ,  H01L21/76802 ,  H01L22/32 ,  H01L23/5386

    Abstract: A package device is provided and includes a redistribution layer. The redistribution layer includes a first dielectric layer, a second dielectric layer, and a conductive layer. The second dielectric layer is disposed on the first dielectric layer, and the second dielectric layer includes a dielectric pattern. The conductive layer is disposed between the first dielectric layer and the second dielectric layer, and the conductive layer includes a first conductive pattern. The dielectric pattern has a through hole, and in a top view of the package device, the first conductive pattern and the through hole are overlapped with each other.

    ELECTRONIC DEVICE HAVING INTEGRATED CIRCUIT CHIP CONNECTED TO PADS ON SUBSTRATE
    19.
    发明公开
    ELECTRONIC DEVICE HAVING INTEGRATED CIRCUIT CHIP CONNECTED TO PADS ON SUBSTRATE 审中-公开

    公开(公告)号：US20230307347A1

    公开(公告)日：2023-09-28

    申请号：US18204405

    申请日：2023-06-01

    Applicant: InnoLux Corporation

    Inventor： Mei-Chi Hsu ,  Yu-Chin Lin ,  Yu-Ting Liu

    IPC: H01L23/498 ,  H01L23/00

    CPC classification number: H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

    Abstract: The present disclosure provides an electronic device including a substrate, a first pad, an insulating layer, a second pad, a conductive element and a chip. The first pad is disposed on the substrate. The insulating layer is disposed on the first pad and has a plurality of first openings. The second pad is electrically connected to the first pad through the first openings. The conductive particle is disposed on the second pad. The chip is electrically connected to the second pad through the conductive element. In a top view of the electronic device, the first openings are arranged along a long edge of the first pad, and an outline of at least one first opening has a curved shape.

    Bonding pad structure
    20.
    发明授权
    Bonding pad structure 有权

    公开(公告)号：US11406015B2

    公开(公告)日：2022-08-02

    申请号：US16884323

    申请日：2020-05-27

    Applicant: InnoLux Corporation

    Inventor： Yu-Ting Liu ,  Yeong-E Chen ,  Chean Kee

    IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18

    Abstract: An electronic device is provided. The electronic device includes: a substrate, wherein the substrate has a normal direction; a first bonding pad and a second bonding pad disposed side by side on the substrate. The first bonding pad includes a first conductive layer and a second conductive layer, and the first conductive layer is adjacent to the second conductive layer. The second bonding pad includes a third conductive layer, the third conductive layer is adjacent to the second conductive layer, and in the normal direction, a distance between a bottom surface of the third conductive layer and the substrate is different than a distance between a bottom surface of the second conductive layer and the substrate. Viewed from the normal direction of the substrate, at least part of the second conductive layer is between the first conductive layer and the third conductive layer.

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