Abstract:
A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.
Abstract:
A system comprises a microwave backhaul outdoor unit having a first resonant circuit, phase error determination circuitry, and phase error compensation circuitry. The first resonant circuit is operable to generate a first signal characterized by a first amount of phase noise and a first amount of temperature stability. The phase error determination circuitry is operable to generate a phase error signal indicative of phase error between the first signal and a second signal, wherein the second signal is characterized by a second amount of phase noise that is greater than the first amount of phase noise, and the second signal is characterized by a second amount of temperature instability that is less than the first amount of temperature instability. The phase error compensation circuitry is operable to adjust the phase of a data signal based on the phase error signal, the adjustment resulting in a phase compensated signal.
Abstract:
Methods and systems are provided for multi-chip receivers with loop-through feeds. A receiver that comprises plurality of chips may receive one or more input feeds, with each of the chips generating a corresponding output comprising data (e.g., channels) extracted from the one or more input feeds. Only a first chip may handle reception and/or initial processing of the one or more input feeds, with each one of the remaining chips processing a loop-through feed generated in the first chip, in order to generate the corresponding output of that chip. The loop-through feed may be generated based on the one or more input feeds. In this regard, the loop-through feed may comprise at least one of the one or more input feeds that is partially processed in the first one of the plurality of chips.
Abstract:
A signal processing circuit, which is within a satellite reception assembly, may be operable to analyze actual frequency information corresponding to a plurality of downconverted signals. Each of the downconverted signals may be downconverted using one or more corresponding local oscillators (LOs). Based on the analyzing, one or more of the following may be determined: one or more frequency offsets associated with the one or more corresponding LOs and one or more actual guard bands. The signal processing circuit may generate information on the determined frequency offsets and the determined actual guard bands. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped. The signal processing circuit may perform, based on the generated information, frequency corrections for channel tuning in a gateway.
Abstract:
A direct broadcast satellite (DBS) reception assembly may receive a desired satellite signal and process the desired satellite signal for output to a gateway. The DBS assembly may also receive one or more undesired satellite signals and determine a performance metric of the one or more undesired satellite signals. The elevation angle of the assembly and/or the azimuth angle of the assembly may be adjusted based on the performance metric(s) of the undesired satellite signal(s). The adjusting of the elevation angle and/or the azimuth angle may comprise electronically steering a directivity of a receive radiation pattern of the DBS reception assembly and/or mechanically steering one or more components of the assembly via motors, servos, actuators, MEMS, and/or the like. The performance metric may be received signal strength of the undesired signals, received signal strength of the desired signal, SNR of the desired signal, and/or SNR of the undesired signals.
Abstract:
A signal processing circuit, which is within a satellite reception assembly, may be operable to analyze actual frequency information corresponding to a plurality of downconverted signals. Each of the downconverted signals may be downconverted using one or more corresponding local oscillators (LOs). Based on the analyzing, one or more of the following may be determined: one or more frequency offsets associated with the one or more corresponding LOs and one or more actual guard bands. The signal processing circuit may generate information on the determined frequency offsets and the determined actual guard bands. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped. The signal processing circuit may perform, based on the generated information, frequency corrections for channel tuning in a gateway.
Abstract:
A satellite reception assembly may comprise a housing configured to support receipt and handling of a plurality of satellite signals. The housing may comprise circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.
Abstract:
A satellite reception assembly that provides satellite television and/or radio service to a customer premises may comprise a wireless interface via which it can communicate with other satellite reception assemblies. Wireless connections between satellite reception assemblies may be utilized for providing satellite content between different satellite customer premises. Wireless connections between satellite reception assemblies may be utilized for offloading traffic from other network connections.
Abstract:
Methods and systems are provided for guard band detection and/or frequency offset detection. For example, a signal processing circuit may be operable to determine, for each of a plurality of downconverted signals, one or more frequency offsets that are associated with one or more corresponding local oscillators (LOs) used in obtaining the plurality of downconverted signals; and relating to the determined frequency offsets may be generated for the plurality of downconverted signals. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped.
Abstract:
A satellite reception assembly that provides satellite television and/or radio service to a customer premises may comprise a wireless interface via which it can communicate with other satellite reception assemblies. Wireless connections between satellite reception assemblies may be utilized for providing satellite content between different satellite customer premises. Wireless connections between satellite reception assemblies may be utilized for offloading traffic from other network connections.