公开(公告)号：US20240361697A1

公开(公告)日：2024-10-31

申请号：US18560234

申请日：2021-05-14

Applicant: Resonac Corporation

Inventor： Yuki IMAZU ,  Kazuyuki MITSUKURA ,  Masaya TOBA ,  Yu AOKI ,  Takuya KOMINE

IPC: G03F7/16 ,  G01N5/04 ,  G03F7/038 ,  G03F7/039 ,  H01L21/027

CPC classification number: G03F7/168 ,  G01N5/04 ,  G03F7/038 ,  G03F7/039 ,  H01L21/0274

Abstract: The present disclosure relates to a method for selecting a photosensitive resin composition, the method including: a step of applying a photosensitive resin composition on a substrate and drying the photosensitive resin composition to form a resin film; a step of heat-treating the resin film in a nitrogen atmosphere to obtain a cured film; and a step of raising the temperature from 25° C. to 300° C. at a rate of 10° C./min in a nitrogen atmosphere and then measuring weight loss of the cured film, in which a photosensitive resin composition capable of producing the cured film having a weight loss ratio at 300° C. of 1.0% to 6.0% is selected.

公开(公告)号：US20240057263A1

公开(公告)日：2024-02-15

申请号：US18260468

申请日：2021-01-06

Applicant: Resonac Corporation

Inventor： Masaya TOBA ,  Masaki YAMAGUCHI ,  Kazuyuki MITSUKURA

IPC: H05K3/18 ,  H05K3/10 ,  H05K3/02

CPC classification number: H05K3/181 ,  H05K3/107 ,  H05K3/025

Abstract: A method for manufacturing a wiring board including: providing a laminate including an insulating material layer and a copper layer provided on a surface of the insulating material layer, and in which the copper layer is an electroless copper plating layer; forming a resist pattern including a groove reaching a surface of the copper layer on the surface of the copper layer; and filling the groove with a conductive material containing copper by electrolytic copper plating. The thickness of the electroless copper plating layer is, for example, 20 nm to 200 nm.

公开(公告)号：US20250168975A1

公开(公告)日：2025-05-22

申请号：US18839728

申请日：2022-02-22

Applicant: Resonac Corporation

Inventor： Masataka NISHIDA ,  Hirokazu NOMA ,  Masaki YAMAGUCHI ,  Masaya TOBA ,  Kazuyuki MITSUKURA

IPC: H05K1/03 ,  H05K3/00

Abstract: A method for producing a core substrate for wiring boards, which includes hot pressing an intermediate base material including a fiber base material and a thermosetting resin composition impregnated into the fiber base material, thereby forming a core substrate having a core portion having a first main surface and a second main surface on the rear side of the first main surface, the core portion including the fiber base material and an insulating resin layer that is the cured or semi-cured thermosetting resin composition; and planarizing at least one surface of the first main surface or the second main surface, thereby forming a flat surface.

公开(公告)号：US20240383035A1

公开(公告)日：2024-11-21

申请号：US18770661

申请日：2024-07-12

Applicant: RESONAC CORPORATION

Inventor： Yoshinori EJIRI ,  Shinichirou SUKATA ,  Masaya TOBA ,  Hideo NAKAKO ,  Yuki KAWANA ,  Kosuke URASHIMA ,  Motoki YONEKURA ,  Takaaki NOHDOH ,  Yoshiaki KURIHARA ,  Hiroshi MASUDA ,  Keita SONE

IPC: B22F7/08 ,  B22F1/052 ,  H05K1/03 ,  H05K1/09 ,  H05K1/18 ,  H05K3/12 ,  H05K3/34

Abstract: One aspect of the present invention is a method for manufacturing an electronic component, the method including: a first step of applying a metal paste containing metal particles onto a polymer compact in a prescribed pattern to form a metal paste layer; a second step of sintering the metal particles to form metal wiring; a third step of applying a solder paste containing solder particles and a resin component onto the metal wiring to form a solder paste layer; a fourth step of disposing an electronic element on the solder paste layer; and a fifth step of heating the solder paste layer so as to form a solder layer bonding the metal wiring and the electronic element, and so as to form a resin layer covering at least a portion of the solder layer.

公开(公告)号：US20240282684A1

公开(公告)日：2024-08-22

申请号：US18641480

申请日：2024-04-22

Applicant: RESONAC CORPORATION

Inventor： Kazuyuki MITSUKURA ,  Masaya TOBA ,  Yoshinori EJIRI ,  Kazuhiko KURAFUCHI

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/12 ,  H01L23/14 ,  H01L23/32 ,  H01L23/538 ,  H01L25/065 ,  H05K1/09

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L23/12 ,  H01L23/145 ,  H01L23/32 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L25/0652 ,  H01L2225/06506 ,  H01L2225/06548 ,  H01L2225/06572 ,  H05K1/09

Abstract: An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.

公开(公告)号：US20240250025A1

公开(公告)日：2024-07-25

申请号：US18560406

申请日：2021-05-21

Applicant: Resonac Corporation

Inventor： Kazuyuki MITSUKURA ,  Masaya TOBA

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L23/5283 ,  H01L21/76877 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L24/32 ,  H01L2224/32225 ,  H01L2924/1815

Abstract: A method for manufacturing a semiconductor device includes forming a first organic insulating layer including a groove; forming a conductive layer formed from a conductive material on the first organic insulating layer to fill the groove with the conductive material; removing a portion of the conductive layer on the first organic insulating layer, and acquiring a first wiring structure including a first wiring layer and the first organic insulating layer; providing a second wiring structure including a second organic insulating layer and a second wiring layer; and stacking the first wiring structure and the second wiring structure by pressurizing them while performing alignment so that the first wiring layer and the second wiring layer correspond to each other. In the stacking, the first wiring layer and the second wiring layer are joined, and the first organic insulating layer and the second organic insulating layer are joined to each other.

公开(公告)号：US20240030044A1

公开(公告)日：2024-01-25

申请号：US18247077

申请日：2021-09-29

Applicant: Resonac Corporation

Inventor： Masaya TOBA ,  Kazuyuki MITSUKURA ,  Masaki YAMAGUCHI

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L21/4857 ,  H01L23/49822 ,  H01L23/49838

Abstract: A method for manufacturing a wiring board includes preparing a structure body in which a resin sheet having a glass cloth arranged in an organic resin is attached onto a support body having a metal layer provided on a surface thereof or onto a built-in wiring layer provided on the support body, forming a recess by excimer laser in a first resin layer region in which the glass cloth does not exist on a surface side of the resin sheet, forming an opening portion reaching the metal layer on the support body from the surface of the resin sheet, and forming a wiring layer in the recess and the opening portion.