公开(公告)号：US20250132231A1

公开(公告)日：2025-04-24

申请号：US18489961

申请日：2023-10-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jie CHANG ,  Jonghwan BAEK ,  Keunhyuk LEE

IPC: H01L23/495 ,  H01L23/373

Abstract: In a general aspect, a semiconductor device assembly includes a substrate, a semiconductor die coupled to the substrate, and a conductive clip coupled to the semiconductor die. The conductive clip is arranged along a longitudinal axis and a transverse axis. The conductive clip has a length along the longitudinal axis, a width along the transverse axis, and a slot defined therethrough. The slot has a length along the longitudinal axis that is greater than or equal to seventy percent of the length of the conductive clip along the longitudinal axis. The slot has a width along the transverse axis that is greater than or equal to thirty percent of the width of the conductive clip along the transverse axis.

公开(公告)号：US20250125227A1

公开(公告)日：2025-04-17

申请号：US18990219

申请日：2024-12-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jonghwan BAEK ,  JeongHyuk PARK ,  Seungwon IM ,  Keunhyuk LEE

IPC: H01L23/495 ,  H01L23/00

Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.

公开(公告)号：US20240413148A1

公开(公告)日：2024-12-12

申请号：US18808298

申请日：2024-08-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tiburcio A. MALDO ,  Keunhyuk LEE ,  Jerome TEYSSEYRE

IPC: H01L27/06 ,  H01L21/48 ,  H01L23/13 ,  H01L23/498

Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor devices on opposed surfaces of a leadframe, to provide an isolated, three-dimensional (3D) configuration. The described implementations minimize electrical failures, even for very high voltage applications, while enabling low inductance and high current. Resulting semiconductor device packages have mounting surfaces that provide desired levels of isolation and insulation, while still enabling straightforward mounting techniques, such as soldering, as well as high levels of thermal reliability.

公开(公告)号：US20240128140A1

公开(公告)日：2024-04-18

申请号：US18485966

申请日：2023-10-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Jeonghyuk PARK ,  Keunhyuk LEE ,  Jerome TEYSSEYRE ,  Paolo BILARDO

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/367 ,  H01L23/495

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/367 ,  H01L23/49555

Abstract: In one general aspect, an apparatus can include a semiconductor die, a molding material disposed around at least a portion of the semiconductor die, and a pair of leads electrically coupled to the semiconductor die and aligned along a first direction from the molding material. The molding material can define an elongated protrusion aligned along a second direction orthogonal to the first direction, and a notch disposed between the pair of leads.

公开(公告)号：US20230253393A1

公开(公告)日：2023-08-10

申请号：US18301939

申请日：2023-04-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jonghwan BAEK ,  JeongHyuk PARK ,  Seungwon IM ,  Keunhyuk LEE

IPC: H01L25/18 ,  H01L23/495 ,  H01L23/367 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/18 ,  H01L23/49524 ,  H01L23/3677 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/33 ,  H01L25/50 ,  H01L23/49575 ,  H01L2224/33181 ,  H01L2224/32245

Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.

公开(公告)号：US20210265175A1

公开(公告)日：2021-08-26

申请号：US17315671

申请日：2021-05-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Keunhyuk LEE ,  Oseob JEON ,  Joonseo SON ,  Seungwon IM

IPC: H01L21/56 ,  H05K3/28 ,  H01L23/498 ,  H01L23/373 ,  H01L23/31 ,  H01L25/07

Abstract: A method can include coupling a semiconductor chip and an electrode with a substrate. Bottom and top mold die can be use, where the top mold die define a first space and a second space that is separated from the first space. The method can include injecting encapsulation material to form an encapsulation member coupled to and covering at least a portion of the substrate. The encapsulation member can include a housing unit housing the electrode. The electrode can have a conductive sidewall exposed to, and not in contact with the encapsulation member, such that there is open space between the conductive sidewall of the electrode and the encapsulation member from an uppermost surface to a bottommost surface of the encapsulation member, the substrate can having a portion exposed within the open space, and the encapsulation member can have an open cross-section perpendicular to an upper surface of the substrate.

公开(公告)号：US20200144744A1

公开(公告)日：2020-05-07

申请号：US16736277

申请日：2020-01-07

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jie CHANG ,  Huibin CHEN ,  Tiburcio MALDO ,  Keunhyuk LEE

IPC: H01R12/58 ,  H05K3/30 ,  H01R13/03 ,  H01L23/498 ,  H01L23/495

Abstract: Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate.

公开(公告)号：US20190304883A1

公开(公告)日：2019-10-03

申请号：US15939632

申请日：2018-03-29

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tiburcio MALDO ,  Keunhyuk LEE

IPC: H01L23/495 ,  H01L23/31 ,  H01R12/58

Abstract: A semiconductor package assembly has a leadframe that includes a socket member into which solderless pins may be inserted as interconnects to an external component. The cost of manufacturing such a leadframe is reduced without sacrificing the ability to make solderless connections with external components such as PCBs. For example, instead of using a hard material that requires two stamping tools, the leadframes with female sockets may be made using softer copper-based materials. Moreover, the width of such leadframes is significantly smaller than the width of a leadframe with the press-fit pins included. Such a reduced width may further reduce manufacturing costs.

公开(公告)号：US20240312855A1

公开(公告)日：2024-09-19

申请号：US18185514

申请日：2023-03-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： XiaoYing YUAN ,  Jie CHANG ,  Keunhyuk LEE

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L23/3107 ,  H01L21/565 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49551 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13091

Abstract: A package includes a semiconductor die attached to a substrate and a mold body encapsulating the semiconductor die. A first portion of a lead is directly bonded to a contact pad on the semiconductor die with no intervening component between the first portion of the lead and the contact pad. A second portion of the lead extends outside the mold body to form an external terminal of the package. The lead is a dual gauge lead with the first portion of the lead having a thickness perpendicular to the contact pad that is smaller than a thickness of the second portion of the lead extending outside the mold body.

公开(公告)号：US20240304529A1

公开(公告)日：2024-09-12

申请号：US18181950

申请日：2023-03-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jie CHANG ,  XiaoYing YUAN ,  Keunhyuk LEE ,  Jerome TEYSSEYRE ,  Leo GU

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L25/07

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49503 ,  H01L25/072 ,  H01L25/50 ,  H01L23/49562

Abstract: Implementations of high-power semiconductor device modules are described, including automotive power transistor assemblies for use in power amplifier circuits such as a cascode circuit. In some implementations, power amplifier circuit components are provided on separate semiconductor die attached to discrete dual die attach pads. A separation between the die attach pads, as well as a through-hole, provide sufficient isolation between the die to permit operation of the circuit at high voltages without relying on a thick multi-layer direct bond copper (DBC) isolation structure. In some implementations, higher voltage operation can be supported by a thin multi-layer, resin coated copper DAP in which the top layer is split.