公开(公告)号：US20190057025A1

公开(公告)日：2019-02-21

申请号：US15914178

申请日：2018-03-07

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE ,  Duk-Rae LEE

IPC: G06F12/02 ,  G06F3/06

Abstract: A memory system includes: a memory device including a plurality of memory blocks each having a plurality of pages suitable for storing data; and a controller suitable for: receiving a plurality of commands from a host; controlling the memory device to perform a plurality of command operations in response to the plurality of commands; identifying parameters for the memory blocks affected by the command operations performed to the memory blocks; selecting first memory blocks among the memory blocks according to the parameters; and controlling the memory device to swap data stored in the first memory blocks to second memory blocks among the memory blocks.

公开(公告)号：US20180081552A1

公开(公告)日：2018-03-22

申请号：US15602784

申请日：2017-05-23

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06 ,  G06F11/14

CPC classification number: G06F3/065 ,  G06F3/0604 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0685 ,  G06F11/1451 ,  G06F11/1469 ,  G06F2201/805 ,  G06F2201/82

Abstract: A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for performing a plurality of operations to first memory blocks among the memory blocks at a first time, recording a checkpoint information for the operations in the memory blocks, selecting second memory blocks among the first memory blocks through the checkpoint information at a second time after a power-off in the memory system while performing the operations, and performing a dummy write operation to the second memory blocks.

公开(公告)号：US20180074718A1

公开(公告)日：2018-03-15

申请号：US15605180

申请日：2017-05-25

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/0607 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/065 ,  G06F3/0655 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/7208 ,  G11C11/005 ,  G11C16/105 ,  G11C16/20

Abstract: A memory system includes: a nonvolatile memory device; a volatile memory; and a controller suitable for storing a plurality of operation information and a plurality of version information, and selectively copying updated operation information from the volatile memory into the nonvolatile memory device at a predetermined moment based on the plurality of version information, the plurality of operation information may be respectively to be used during the plurality of predetermined operations to the nonvolatile memory device, and the plurality of version information respectively may represent whether the plurality of operation information are updated or not.

公开(公告)号：US20170337001A1

公开(公告)日：2017-11-23

申请号：US15407046

申请日：2017-01-16

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/0626 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0679

Abstract: A memory system includes: a memory device including a plurality of memory blocks; and a controller including a memory, the controller being suitable for: selecting a source memory block and a target memory block among the plurality of memory blocks; loading map segments of map data for the source memory block on the memory; determining valid pages, among a plurality of pages included in the source memory block, through the map segments; loading valid data stored in the valid pages on the memory; updating map data for the valid data; and storing the valid data and the updated map data in a plurality of pages included in the target memory block.

公开(公告)号：US20170322731A1

公开(公告)日：2017-11-09

申请号：US15406320

申请日：2017-01-13

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/061 ,  G06F3/0652 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: A memory system includes a memory device including a plurality of memory blocks; and a controller suitable for; storing user data corresponding to a write command received from a host, in the memory blocks, storing map data in response to storing of the user data, in the memory blocks, sorting map segments included in the map data, according to logical information of the user data, determining correlations for the memory blocks, through the map segments, and selecting source memory blocks among the memory blocks based on the determined correlations.

公开(公告)号：US20170168722A1

公开(公告)日：2017-06-15

申请号：US15153449

申请日：2016-05-12

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0605 ,  G06F3/061 ,  G06F3/0626 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1028 ,  G06F2212/1036 ,  G06F2212/1041 ,  G06F2212/1056 ,  G06F2212/214 ,  G06F2212/7205 ,  Y02D10/13

Abstract: A memory system includes a memory device including a plurality of memory blocks; and a controller suitable for selecting for a garbage collection operation one or more source memory blocks among closed memory blocks in the plurality of memory blocks according to at least one parameter of the closed memory blocks and parameter deviations of the closed memory blocks depending on the at least one parameter.

公开(公告)号：US20210097008A1

公开(公告)日：2021-04-01

申请号：US17122461

申请日：2020-12-15

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F13/16 ,  G06F13/42 ,  G06F3/06

Abstract: A data processing system includes a memory system including a memory device storing data and a controller performing a data program operation or a data read operation with the memory device, and a host suitable for requesting the data program operation or the data read operation from the memory system. The controller can perform a serial communication to control a memory which is arranged outside the memory system and engaged with the host.

公开(公告)号：US20200310909A1

公开(公告)日：2020-10-01

申请号：US16694908

申请日：2019-11-25

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F11/10 ,  G06F11/07 ,  G11C29/10 ,  G11C11/409 ,  G11C11/408

Abstract: A memory system includes: a memory device; and a controller suitable for performing a first test read operation on a first plurality of candidate memory blocks, determining a test read method of a second test read operation based on a reference value and a first number of the first plurality candidate memory blocks scanned in the first test read operation, and performing the second test read operation on a second plurality of candidate memory blocks based on the determined test read method.

公开(公告)号：US20200097400A1

公开(公告)日：2020-03-26

申请号：US16404437

申请日：2019-05-06

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F12/02

Abstract: A memory system includes: a memory device; a memory; a plurality of queues; a victim block manager suitable for storing garbage collection information corresponding to a victim block in the memory; a queue manager suitable for classifying the garbage collection information and the queues according to attribute and queuing the classified garbage collection information to the corresponding queues, respectively; and a garbage collection performer suitable for controlling a garbage collection operation of the memory device based on the queued garbage collection information.

公开(公告)号：US20200081833A1

公开(公告)日：2020-03-12

申请号：US16531961

申请日：2019-08-05

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F12/02 ,  G06F12/10

Abstract: A memory system includes a memory device including plural blocks, each capable of storing data, and a controller coupled with the memory device. The controller can generate a blocklist including a valid page count for at least one target block among the plural blocks before updating a map data, update the map data and the valid page count of the at least one target block, compare the previous valid page count stored in the blocklist with the updated valid page count, and erase invalid map data of the at least one target block according to a comparison result.