公开(公告)号：US20230282656A1

公开(公告)日：2023-09-07

申请号：US18009052

申请日：2021-06-15

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Vincent Desmaris ,  Anders Johansson ,  Ola Tiverman ,  Karl Lundahl ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Victor Marknäs

IPC: H01L27/146 ,  H01L21/3105

CPC classification number: H01L27/14609 ,  H01L27/14636 ,  H01L27/14683 ,  H01L21/31053 ,  H01L28/91

Abstract: An image sensor comprising an image sensor layer having a plurality of image sensor layer contact pads; and a plurality of photo-sensitive elements, each being coupled to a respective image sensor layer contact pad; and a capacitor layer having: a plurality of first capacitor contact structures, each being constituted by a capacitor layer top contact pad bonded to a respective image sensor layer contact pad of the image sensor layer; a plurality of second capacitor contact structures; and a plurality of capacitors, embedded in a first dielectric material, each capacitor including at least one electrically conductive vertical nanostructure electrically conductively connected to one of a respective first capacitor contact structure and a respective second capacitor contact structure, and conductively separated from the other one of the respective first capacitor contact structure and the respective second capacitor contact structure by a layer of a second dielectric material.

公开(公告)号：US10991652B2

公开(公告)日：2021-04-27

申请号：US17011238

申请日：2020-09-03

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Rickard Andersson ,  Vincent Desmaris

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/29 ,  H01L23/00 ,  H01L49/02 ,  B82Y30/00

Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.

公开(公告)号：US10770390B2

公开(公告)日：2020-09-08

申请号：US16463970

申请日：2018-08-23

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Rickard Andersson ,  Vincent Desmaris

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/29 ,  H01L23/00 ,  H01L49/02 ,  B82Y30/00

Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.

公开(公告)号：US10741485B2

公开(公告)日：2020-08-11

申请号：US16550706

申请日：2019-08-26

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Peter Enoksson ,  Vincent Desmaris ,  Rickard Andersson

IPC: H01L21/02 ,  H01L23/498 ,  H01G4/35 ,  H01L23/50 ,  H01L21/48 ,  H01L23/14 ,  H01L23/538

Abstract: A nanostructure energy storage device comprising: at least a first plurality of conductive nanostructures provided on an electrically insulating surface portion of a substrate; a conduction controlling material embedding each nanostructure in said first plurality of conductive nanostructures; a first electrode connected to each nanostructure in said first plurality of nanostructures; and a second electrode separated from each nanostructure in said first plurality of nanostructures by said conduction controlling material, wherein said first electrode and said second electrode are configured to allow electrical connection of said nanostructure energy storage device to an integrated circuit.

公开(公告)号：US20150318085A1

公开(公告)日：2015-11-05

申请号：US14795598

申请日：2015-07-09

Applicant: Smoltek AB

Inventor： Jonas S. T. Berg ,  Vincent Desmaris ,  Mohammad Shafiqul Kabir ,  Muhammad Amin Saleem ,  David Brud

IPC: H01B13/00

CPC classification number: C23C16/26 ,  B82Y10/00 ,  B82Y40/00 ,  C01B32/15 ,  C23C16/503 ,  G02B6/26 ,  H01B13/0026 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/4871 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/3677 ,  H01L23/3737 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/53276 ,  H01L29/0665 ,  H01L29/66439 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.

公开(公告)号：US08866307B2

公开(公告)日：2014-10-21

申请号：US13961532

申请日：2013-08-07

Applicant: Smoltek AB

Inventor： Jonas S. T. Berg ,  Vincent Desmaris ,  Mohammad Shafiqul Kabir ,  Muhammad Amin Saleem ,  David Brud

IPC: H01L23/48 ,  H01L21/768 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06 ,  H01L29/66 ,  H01L23/498 ,  H01L21/02

CPC classification number: C23C16/26 ,  B82Y10/00 ,  B82Y40/00 ,  C01B32/15 ,  C23C16/503 ,  G02B6/26 ,  H01B13/0026 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/4871 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/3677 ,  H01L23/3737 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/53276 ,  H01L29/0665 ,  H01L29/66439 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.

Abstract translation: 公开了一种制造一种或多种纳米结构的方法，所述方法包括：在衬底的上表面上沉积导电层; 在导电层上沉积图案化的催化剂层; 在催化剂层上生长一个或多个纳米结构; 并且选择性地去除所述一个或多个纳米结构之间和周围的导电层。 还公开了一种包括衬底的器件，其中衬底包括由一个或多个绝缘区域隔开的一个或多个暴露的金属岛; 设置在所述基板上的导电助垫，其覆盖所述一个或多个暴露的金属岛或绝缘区域中的至少一些; 设置在导电助听器上的催化剂层; 以及设置在催化剂层上的一个或多个纳米结构。

公开(公告)号：US12033797B2

公开(公告)日：2024-07-09

申请号：US17283105

申请日：2019-10-07

Applicant: Smoltek AB

Inventor： Vincent Desmaris ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Anders Johansson ,  Fredrik Liljeberg ,  Ola Tiverman ,  M Shafiqul Kabir

IPC: H01G11/36 ,  H01G11/56 ,  H01M10/0585 ,  H01M50/11 ,  H05K1/18

CPC classification number: H01G11/36 ,  H01G11/56 ,  H01M10/0585 ,  H01M50/11 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10037

Abstract: A discrete metal-insulator-metal (MIM) energy storage component, the energy storage component comprising: a MIM-arrangement comprising: a first electrode layer; a plurality of conductive nanostructures grown from the first electrode layer; a conduction controlling material covering each nanostructure in the plurality of conductive nanostructures and the first electrode layer uncovered by the conductive nanostructures; and a second electrode layer covering the conduction controlling material; a first connecting structure for external electrical connection of the capacitor component; a second connecting structure for external electrical connection of the capacitor component; and an electrically insulating encapsulation material at least partly embedding the MIM-arrangement.

公开(公告)号：US20230075019A1

公开(公告)日：2023-03-09

申请号：US17795999

申请日：2021-01-28

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Vincent Desmaris ,  Anders Johansson ,  Ola Tiverman ,  Karl Lundahl ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Victor Marknäs

IPC: H01L25/16 ,  H05K1/11 ,  H01G4/005 ,  H01L49/02 ,  H01L23/00 ,  H01L23/64 ,  H05K1/02

Abstract: An electronic system comprising a substrate with a substrate conductor pattern including substrate pads; a semiconductor component with active circuitry, and component pads coupled to the active circuitry of the semiconductor component and connected to the substrate pads of the substrate; a power source interface for receiving power from a power source; and a power distribution network for distributing power from the power source interface to the active circuitry of the semiconductor component. The power distribution network includes a first capacitor realized by conductive structures comprised in the semiconductor component, the first capacitor being coupled to a first component pad and a second component pad of the semiconductor component; a second capacitor arranged between the substrate and the semiconductor component, the second capacitor being coupled to the first component pad and the second component pad of the component package; and a power grid portion of the substrate conductor pattern.

公开(公告)号：US20220005777A1

公开(公告)日：2022-01-06

申请号：US17289060

申请日：2019-11-20

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Vincent Desmaris ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Anders Johansson ,  Fredrik Liljeberg ,  Ola Tiverman

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L49/02

Abstract: A semiconductor assembly, comprising: a first semiconductor die including processing circuitry and pads, said first semiconductor die having a first surface and a second surface opposite the first surface; a second semiconductor die including memory circuitry and pads, said second semiconductor die being arranged on one of the first surface and the second surface of said first semiconductor die, and pads of said second semiconductor die being coupled to pads of said first semiconductor die; and at least a first capacitor having terminals, said first capacitor being arranged on one of the first surface and the second surface of said first semiconductor die and the terminals of said capacitor being coupled to pads of said first semiconductor die.

公开(公告)号：US20210043594A1

公开(公告)日：2021-02-11

申请号：US17077237

申请日：2020-10-22

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Vincent Desmaris ,  Muhammad Amin Saleem

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498

Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.