公开(公告)号：US10158067B2

公开(公告)日：2018-12-18

申请号：US15696119

申请日：2017-09-05

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kazuhiko Yamamoto ,  Yosuke Murakami ,  Yusuke Arayashiki ,  Yusuke Kobayashi

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00

Abstract: A memory device includes a first conductive layer, a second conductive layer, and a variable resistance layer provided between the first and second conductive layers. The variable resistance layer includes a first layer having a semiconductor or a first metal oxide containing a first metal, and a second layer provided between the first layer and the second conductive layer, having a second metal oxide containing a second metal, and having crystal grains that are not in contact with at least one of an end face of the second layer on a side of the first conductive layer or an end face of the second layer on a side of the second conductive layer.

公开(公告)号：US20180277753A1

公开(公告)日：2018-09-27

申请号：US15696119

申请日：2017-09-05

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kazuhiko YAMAMOTO ,  Yosuke Murakami ,  Yusuke Arayashiki ,  Yusuke Kobayashi

IPC: H01L45/00 ,  G11C13/00

CPC classification number: H01L45/08 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0045 ,  G11C2213/32 ,  G11C2213/33 ,  G11C2213/51 ,  G11C2213/52 ,  G11C2213/55 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/148

Abstract: A memory device includes a first conductive layer, a second conductive layer, and a variable resistance layer provided between the first and second conductive layers. The variable resistance layer includes a first layer having a semiconductor or a first metal oxide containing a first metal, and a second layer provided between the first layer and the second conductive layer, having a second metal oxide containing a second metal, and having crystal grains that are not in contact with at least one of an end face of the second layer on a side of the first conductive layer or an end face of the second layer on a side of the second conductive layer.