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    Devices with a single metal layer
    11.
    发明授权
    Devices with a single metal layer 有权

    公开(公告)号：US11127812B2

    公开(公告)日：2021-09-21

    申请号：US16579386

    申请日：2019-09-23

    Applicant: X Display Company Technology Limited

    Inventor： Christopher Bower ,  Matthew Meitl ,  Carl Prevatte ,  Ronald S. Cok

    IPC: H01L27/32 ,  H01L27/146 ,  H01L27/15 ,  H01L25/075 ,  H01L33/62

    Abstract: A single metal layer device, such as a display or sensor, comprises a substrate and a patterned metal layer. The patterned metal layer forms a two-dimensional array of spatially separated column line segments that each extend only partially across the display substrate in a column direction and forms a one-dimensional array of row lines extending across the display substrate in a row direction different from the column direction. The row lines and column line segments are electrically separate in the patterned metal layer. Spatially separated electrical jumpers are disposed on the display substrate and electrically connect pairs of column line segments adjacent in the column direction. Each electrical jumper has an independent jumper substrate independent of and separate from the display substrate. In certain embodiments, spatially separated light-emitting pixel circuits are disposed on a display substrate and are electrically connected to at least one row line and one column line.

    PRINTABLE DEVICE WAFERS WITH SACRIFICIAL LAYERS
    12.
    发明申请
    PRINTABLE DEVICE WAFERS WITH SACRIFICIAL LAYERS 有权

    公开(公告)号：US20210167100A1

    公开(公告)日：2021-06-03

    申请号：US17167945

    申请日：2021-02-04

    Applicant: X Display Company Technology Limited

    Inventor： Christopher Bower ,  Etienne Menard ,  Matthew Meitl ,  Joseph Carr

    IPC: H01L27/12 ,  H01L21/84 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L29/786

    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

    Wafers with etchable sacrificial patterns, anchors, tethers, and printable devices
    13.
    发明授权
    Wafers with etchable sacrificial patterns, anchors, tethers, and printable devices 有权

    公开(公告)号：US10943931B2

    公开(公告)日：2021-03-09

    申请号：US16697104

    申请日：2019-11-26

    Applicant: X Display Company Technology Limited

    Inventor： Christopher Bower ,  Etienne Menard ,  Matthew Meitl ,  Joseph Carr

    IPC: H01L29/04 ,  H01L27/12 ,  H01L21/84 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L29/786

    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

    Chiplets with connection posts
    16.
    发明授权
    Chiplets with connection posts 有权

    公开(公告)号：US11552034B2

    公开(公告)日：2023-01-10

    申请号：US16702398

    申请日：2019-12-03

    Applicant: X Display Company Technology Limited

    Inventor： Carl Prevatte ,  Christopher Bower ,  Ronald S. Cok ,  Matthew Meitl

    IPC: H01L23/00 ,  H05K3/34 ,  H05K1/11 ,  H05K3/30

    Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

    CHIPLETS WITH CONNECTION POSTS
    17.
    发明申请
    CHIPLETS WITH CONNECTION POSTS 审中-公开

    公开(公告)号：US20200243467A1

    公开(公告)日：2020-07-30

    申请号：US16778964

    申请日：2020-01-31

    Applicant: X Display Company Technology Limited

    Inventor： Carl Prevatte ,  Christopher Bower ,  Ronald S. Cok ,  Matthew Meitl

    IPC: H01L23/00 ,  H05K1/11 ,  H05K3/34 ,  H05K3/30

    Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

    Chiplets with connection posts
    20.
    发明授权
    Chiplets with connection posts 有权

    公开(公告)号：US11495560B2

    公开(公告)日：2022-11-08

    申请号：US16778964

    申请日：2020-01-31

    Applicant: X Display Company Technology Limited

    Inventor： Carl Prevatte ,  Christopher Bower ,  Ronald S. Cok ,  Matthew Meitl

    IPC: H01L23/00 ,  H05K3/34 ,  H05K1/11 ,  H05K3/30

    Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

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