Abstract:
A manufacturing method according to which surface unevenness of a workpiece on which microprocessing is performed such as a semiconductor substrate or a micromachine is readily flattened with a higher degree of flatness than the prior art even when depressions vary in depth, to thus facilitate the processing of the surface in a subsequent process. The manufacturing method includes the processes of applying a photosensitive resin 2 over the surface of a workpiece 1, exposing the applied resin using a grayscale mask 3 that corresponds to the surface shape of the resin, and developing the exposed resin and eliminating unhardened resin.
Abstract:
A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.
Abstract:
A method is described for manufacturing a micromechanical structure, in which a structured surface is created in a substrate by an etching method in a first method step, and residues are at least partially removed from the structured surface in a second method step. In the second method step, an ambient pressure for the substrate which is lower than 60 Pa is set and a substrate temperature which is higher than 150° C. is set.
Abstract:
A process for the manufacture of semiconductor devices comprising the chemical-mechanical polishing of a substrate or layer containing at least one III-V material in the presence of a chemical-mechanical polishing composition (Q1) comprising (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one amphiphilic non-ionic surfactant having (b1) at least one hydrophobic group; and (b2) at least one hydrophilic group selected from the group consisting of polyoxyalkylene groups comprising (b22) oxyalkylene monomer units other than oxyethylene monomer units; and (M) an aqueous medium.
Abstract:
MEMS devices (40) using etched cavities (42) are desirably formed using multiple etching steps. Preliminary cavities (20) formed by locally anisotropic etching to nearly the final depth have irregular (46) sidewalls (44) and steep and/or inconsistent sidewall (44) to bottom (54) intersection angles (48). This leads to less than desired cavity diaphragm (26) burst strengths. Final cavities (42) with smooth sidewalls (50), smaller and consistent sidewall (50) to bottom (54) intersection angles (58), and having more than doubled cavity diaphragm (26) burst strengths are obtained by treating the preliminary cavities (20) with TMAH etchant, preferably relatively dilute TMAH etchant. In a preferred embodiment, a cleaning step is performed between the etching step and the TMAH treatment step to remove any anisotropic etching by-products present on the preliminary cavities' (20) initial sidewalls (44). The multi-step cavity etching procedure is especially useful for forming robust MEMS pressure sensors, but is applicable to any type of MEMS device.
Abstract:
Methods for manufacturing substrates with difficult to polish features using reverse mask etching and chemical mechanical planarization techniques.
Abstract:
One embodiment of the present invention provides a process that uses selective etching to form a structure on a silicon substrate. The process starts by receiving the silicon substrate with a first layer composed of a first material, which includes voids created by a first etching operation. The process then forms a second layer composed of a second material over the first layer, so that the second layer fills in portions of voids in the first layer created by the first etching operation. Next, the process performs a chemo-mechanical polishing operation on the second layer down to the first layer so that only remaining portions of the second layer, within the voids created by the first etching operation, remain. The system then forms a third layer composed of a third material over the first layer and the remaining portions of the second layer, and performs a second etching operation using a selective etchant to remove the remaining portions of the second layer, thereby creating voids between the first layer and the third layer.
Abstract:
One embodiment of the present invention provides a process that uses selective etching to form a structure on a silicon substrate. The process starts by receiving the silicon substrate with a first layer composed of a first material, which includes voids created by a first etching operation. The process then forms a second layer composed of a second material over the first layer, so that the a second layer fills in portions of voids in the first layer created by the first etching operation. Next, the process performs a chemo-mechanical polishing operation on the second layer down to the first layer so that only remaining portions of the second layer, within the voids created by the first etching operation, remain. The system then forms a third layer composed of a third material over the first layer and the remaining portions of the second layer, and performs a second etching operation using a selective etchant to remove the remaining portions of the second layer, thereby creating voids between the first layer and the third layer.
Abstract:
Disclosed herein are microelectronics package architectures having self-aligned air gaps and methods of manufacturing the same. The microelectronics packages may include first and second substrates, first and second traces, and a photosensitive material. The first trace may be attached to the first substrate and comprise a first sidewall. The second trace may be attached to the first substrate and comprise a second sidewall. The second traced may be spaced a distance from the first trace with the second sidewall facing the first sidewall. First and second portions of the photosensitive material may be attached to the first and second sidewalls, respectively. The second substrate may be attached to the first and second traces. The first and second substrates and the first and second traces may form the air gap in between the first and second traces.
Abstract:
A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.