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    Methods of forming void regions, dielectric regions and capacitor constructions
    2.
    发明授权
    Methods of forming void regions, dielectric regions and capacitor constructions 失效
    形成空隙区域，电介质区域和电容器结构的方法

    公开(公告)号：US06794261B2

    公开(公告)日：2004-09-21

    申请号：US10044206

    申请日：2002-01-11

    Applicant: Jerome Michael Eldridge

    Inventor： Jerome Michael Eldridge

    IPC: H01L2120

    CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

    Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

    Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

    Machine and method for machining a part by micro-electrical discharge machining
    4.
    发明授权
    Machine and method for machining a part by micro-electrical discharge machining 失效
    通过微电加工加工零件的机器和方法

    公开(公告)号：US08715468B2

    公开(公告)日：2014-05-06

    申请号：US13119490

    申请日：2009-09-09

    Applicant: Michel Cabrera

    Inventor： Michel Cabrera

    IPC: C25F7/00 ,  C25F3/02 ,  B23H1/04 ,  B23H9/08

    CPC classification number: B23H3/04 ,  B23H5/02 ,  B23H7/065 ,  B23H7/08 ,  B23H9/00 ,  B23H9/08 ,  B81C2201/0146

    Abstract: The invention relates to a machine for machining a part by micro-electrical discharge machining, said machine comprising a mechanism (44, 45, 46, 48) for modifying the configuration of the machine so as to alternatively and reversibly switch from a machining configuration to a sharpening configuration in which the tip of a same etching electrode (20) and another electrode (64) are dipped in an electrolyte bath in order to sharpen the tip of the etching electrode by electrochemnical corrosion.

    Abstract translation: 本发明涉及一种用于通过微放电加工来加工零件的机器，所述机器包括用于修改机器的构造的机构（44,45,46,48），以便可替代地且可逆地从加工构型切换到 其中相同的蚀刻电极（20）的尖端和另一个电极（64）被浸入电解质浴中以通过电化学腐蚀来锐化腐蚀电极的尖端的锐化构造。

    METHOD FOR ETCHED CAVITY DEVICES
    5.
    发明申请
    METHOD FOR ETCHED CAVITY DEVICES 有权
    蚀刻孔装置的方法

    公开(公告)号：US20120264249A1

    公开(公告)日：2012-10-18

    申请号：US13088100

    申请日：2011-04-15

    Applicant: Srivatsa G. Kundalgurki ,  Scott Dye

    Inventor： Srivatsa G. Kundalgurki ,  Scott Dye

    IPC: H01L21/02 ,  H01L21/3065

    CPC classification number: G01L9/0042 ,  B81C1/00047 ,  B81C2201/0123 ,  B81C2201/0146 ,  B81C2201/017 ,  H01L21/02057 ,  H01L21/30608 ,  H01L21/3065

    Abstract: MEMS devices (40) using etched cavities (42) are desirably formed using multiple etching steps. Preliminary cavities (20) formed by locally anisotropic etching to nearly the final depth have irregular (46) sidewalls (44) and steep and/or inconsistent sidewall (44) to bottom (54) intersection angles (48). This leads to less than desired cavity diaphragm (26) burst strengths. Final cavities (42) with smooth sidewalls (50), smaller and consistent sidewall (50) to bottom (54) intersection angles (58), and having more than doubled cavity diaphragm (26) burst strengths are obtained by treating the preliminary cavities (20) with TMAH etchant, preferably relatively dilute TMAH etchant. In a preferred embodiment, a cleaning step is performed between the etching step and the TMAH treatment step to remove any anisotropic etching by-products present on the preliminary cavities' (20) initial sidewalls (44). The multi-step cavity etching procedure is especially useful for forming robust MEMS pressure sensors, but is applicable to any type of MEMS device.

    Abstract translation: 期望使用多个蚀刻步骤形成使用蚀刻腔（42）的MEMS器件（40）。 通过局部各向异性腐蚀形成的接近最终深度的初级腔（20）具有不规则的（46）侧壁（44）和陡峭和/或不一致的侧壁（44）至底部（54）交叉角（48）。 这导致比所需的腔膜（26）突发强度小。 通过处理预备空腔（2）获得具有平滑侧壁（50），更小且一致的侧壁（50）到底部（54）交叉角（58）并且具有多于两倍的腔隔膜（26）的突出强度的最终腔（42） 20）与TMAH蚀刻剂，优选相对稀释的TMAH蚀刻剂。 在优选的实施方案中，在蚀刻步骤和TMAH处理步骤之间进行清洁步骤以去除预备空腔（20）初始侧壁（44）上存在的任何各向异性蚀刻副产物。 多阶腔蚀刻程序对于形成坚固的MEMS压力传感器尤其有用，但适用于任何类型的MEMS器件。

    Vertical indent production repair
    6.
    发明申请
    Vertical indent production repair 有权
    垂直缩进生产维修

    公开(公告)号：US20090070979A1

    公开(公告)日：2009-03-19

    申请号：US11898837

    申请日：2007-09-17

    Applicant: Bernabe J. Arruza ,  Ronald Bozak ,  Kenneth Gilbert Roessler ,  Andrew Dinsdale ,  Tod Evan Robinson ,  David Brinkley

    Inventor： Bernabe J. Arruza ,  Ronald Bozak ,  Kenneth Gilbert Roessler ,  Andrew Dinsdale ,  Tod Evan Robinson ,  David Brinkley

    IPC: B82B3/00 ,  B30B9/28 ,  B30B13/00

    CPC classification number: B81C1/00634 ,  B81C2201/0146 ,  Y10T29/49778

    Abstract: A method of nanomachining is provided. The method includes plunging a nanometer-scaled tip into a surface of a substrate at a first location in a first direction that is substantially perpendicular to the surface, thereby displacing a first portion of the substrate with the tip. The method also includes withdrawing the tip from the substrate in a second direction that is substantially opposite to the first direction. The method further includes moving at least one of the tip and the substrate laterally relative to each other. In addition, the method also includes plunging the tip into the substrate at a second location in a third direction that is substantially parallel to the first direction, thereby displacing a second portion of the substrate with the tip and withdrawing the tip from the substrate in a fourth direction that is substantially opposite to the third direction.

    Abstract translation: 提供了一种纳米加工的方法。 该方法包括在基本上垂直于表面的第一方向上的第一位置处将纳米级尖端突入基片的表面，从而使基片的第一部分与尖端移位。 该方法还包括在基本上与第一方向相反的第二方向从衬底取出尖端。 该方法还包括相对于彼此横向移动尖端和衬底中的至少一个。 此外，该方法还包括在基本上平行于第一方向的第三方向上的第二位置处将尖端插入基板，从而使基板的第二部分与尖端移位，并且将尖端从基板中取出 第四方向与第三方向基本相反。

    Methods of forming void regions, dielectric regions and capacitor constructions
    9.
    发明申请
    Methods of forming void regions, dielectric regions and capacitor constructions 失效
    形成空隙区域，电介质区域和电容器结构的方法

    公开(公告)号：US20020068430A1

    公开(公告)日：2002-06-06

    申请号：US10044206

    申请日：2002-01-11

    Inventor： Jerome Michael Eldridge

    IPC: H01L021/76 ,  H01L021/331

    CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

    Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

    Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

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