Abstract:
To reduce ionic contaminants on printed circuit boards that are at least partially covered with a solder resist mask and are provided with top layers on the copper structures, an aqueous cleaning solution is used, which contains at least one ethanolamine compound and/or the salt thereof, at least one alcoholic solvent and, at need, at least one guanidine compound and/or the salt thereof.
Abstract:
A metal removing solution of the present invention is a solution for removing palladium, tin, silver, palladium alloy, silver alloy, and tin alloy, and the metal removing solution contains a chain thiocarbonyl compound. A removing method of the present invention for removing palladium, tin, silver, palladium alloy, silver alloy, and tin alloy is a method for selectively removing a metal other than copper or copper alloy, from a system that includes copper or copper alloy and at least one selected from palladium, tin, silver, palladium alloy, silver alloy, and tin alloy, by using a metal removing solution containing a chain thiocarbonyl compound. Thus, the present invention provides the metal removing solution capable of removing palladium, tin, silver, palladium alloy, silver alloy, and tin alloy, the solution having an excellent property of removing palladium, tin, silver, palladium alloy, silver alloy, tin alloy, and the like without attacking copper, and having an excellent handleability since the solution does not contain any toxic substance; and the removing method using the foregoing metal removing solution.
Abstract:
An etchant of the present invention includes an aqueous solution containing hydrochloric acid, nitric acid, and a cupric ion source. An etching method of the present invention includes bringing the etchant into contact with at least one metal selected from nickel, chromium, nickel-chromium alloys, and palladium. Another etching method of the present invention includes bringing a first etchant that includes an aqueous solution containing at least the following components A to C (A. hydrochloric acid; B. at least one compound selected from the following (a) to (c): (a) compounds with 7 or less carbon atoms, containing a sulfur atom(s) and at least one group selected from an amino group, an imino group, a carboxyl group, a carbonyl group, and a hydroxyl group; (b) thiazole; and (c) thiazole compounds; and C. a surfactant) into contact with a surface of the metal, and then bringing a second solution that includes an aqueous solution containing hydrochloric acid, nitric acid, and a cupric ion source into contact with the surface of the metal. According to the etchant and the etching methods of the present invention, it is possible to etch at least one metal selected from nickel, chromium, nickel-chromium alloys, and palladium quickly and suppress excessive dissolution of copper.
Abstract:
There is provided a method for producing a reliable metal/ceramic bonding substrate at low costs by forming a desired fillet on the peripheral portion of a metal circuit by a small number of steps. After an active metal containing brazing filler metal 12 is applied on a ceramic substrate 10 to bond a metal member 14 thereto, a resist 16 is applied on a predetermined portion of a surface of the metal member 14 to etch unnecessary portions, and then the resist is removed. Thereafter, unnecessary part of a metal layer 12b, which is formed of a metal other than an active metal of the active metal containing brazing filler metal 12, is etched with a chemical to be removed. Then, unnecessary part of an active metal layer 12a, which is formed of the active metal and a compound thereof, is selectively etched with a chemical, which inhibits the metal member 14 and the metal layer 12b from being etched and which selectively etch the active metal layer 12b, to form a metal circuit on the ceramic substrate 10. This metal circuit is chemically polished to form a fillet on the peripheral portion of the metal circuit.
Abstract:
A printed circuit board having prescribed conductive patterns formed on an insulating layer is provided about 20 mm apart from an AC electrode provided in a plasma etching device. An earth electrode is provided on the side opposing the AC electrode. More specifically, the printed circuit board is provided outside a sheath layer that is a region having a high plasma density generated in the vicinity of the AC electrode. The frequency of an AC power supply is preferably not more than 1 GHz. The pressure in the device is preferably in the range from 1.33×10−2 Pa to 1.33×102 Pa. The inter-electrode distance between the AC electrode and the earth electrode is preferably not more than 150 mm, more preferably from 40 mm to 100 mm.
Abstract:
A process and composition for manufacturing printed wiring boards that reduces or eliminates the problem of depositing electroless nickel in through holes that are not designed to be metal plated is provided. Also provided by the present invention is a method and composition for depositing a final finish that is even and bright. The present invention is particularly suitable for the manufacture of printed circuit boards containing one or more electroless nickel-immersion gold layers.
Abstract:
The present invention provides an electronic device having high insulating reliability, in which metal portions of a circuit are not electrically conductive with each other via an adhesive layer even when the electronic device is used in high-temperature low-humidity conditions or high-temperature high-humidity conditions, and provides a production method for the electronic device, and a semiconductor device comprising the electronic device. In the electronic device in which a circuit formed by pattern formation of metal portions is attached via an adhesive layer to an insulating base, the adhesive layer, which contacts adjacent metal portions, is divided. Typically, the electronic device is one of a lead frame having a lead frame fixing tape, a TAB tape, and a flexible printed circuit board.
Abstract:
In a ceramic hybrid substrate and a method for treating the surface of a ceramic hybrid substrate having ceramic surface areas and metallic surface areas, the ceramic surface areas are esterified.
Abstract:
A method and apparatus to eliminate conductive contamination reliability problems for assembled substrates, such as electrical arcing in power semiconductor leads. One embodiment of the invention involves a method for assembling an electrical component having leads on a substrate having conductive contacts, wherein an elastomer part encapsulates the leads of the electrical component. A second embodiment of the invention involves assembling an electrical component having leads to a substrate having conductive contacts, wherein an elastomer shape cut by a punch die encapsulates the leads of the electrical component. A third embodiment of the invention involves an assembled substrate including an electrical component having leads, and an elastomer surrounding the leads to encapsulate the leads.
Abstract:
A process for removal of undesirable conductive material (e.g., catalyst material and seeped circuit material) on a circuitized substrate and the resultant circuitized substrates disclosed. Such process and resultant circuit effectively address the electrical shorting problems caused by nonremoval of the residual catalyst material and circuit material which has seeped under the residual catalyst material. The process includes the steps of: a) providing a catalyst layer (e.g., palladium and tin) having circuit pattern (e.g., copper) thereon; b) pretreating the catalyst layer and the circuit pattern (e.g., with a cyanide dip) for removal of undesirable portions of each which cause electrical leakage between circuit lines of the circuit pattern; c) oxidizing the catalyst layer and the circuit pattern (e.g., with chlorite, permanganate, hydrogen peroxide, or air at a temperature elevated above ambient conditions); and d) removing the undesirable portions of the catalyst layer and the undesirable portions of the circuit pattern (e.g., with a cyanide submersion). The resultant circuitized substrate includes a circuit pattern on a catalyst layer wherein undesirable portions of the catalyst layer and circuit pattern are completely removed between the circuit features of the circuit pattern so that electrical leakage between the circuit features does not occur.