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公开(公告)号：US11694870B2
公开(公告)日：2023-07-04
申请号：US17351043
申请日：2021-06-17
Applicant: ASML Netherlands B.V.
CPC classification number: H01J37/20 , H02G11/00 , H01J2237/0262 , H01J2237/2007
Abstract: The present disclosure relates to a stage apparatus comprising: an object table configured to hold a substrate, the object table comprising an electrode configured to be charged by a power source and an electrical connection configured to electrically connect the electrode to the power source, and an electric field shield configured to shield at least a part of the electrical connection.
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公开(公告)号：US11694821B2
公开(公告)日：2023-07-04
申请号：US17409213
申请日：2021-08-23
Applicant: ASML Netherlands B.V.
Inventor： Ferry Zijp
CPC classification number: G21K1/06 , B24C1/08 , G21K1/067 , G21K2201/064 , G21K2201/067
Abstract: A reflector comprising a hollow body having an interior surface defining a passage through the hollow body, the interior surface having at least one optical surface part configured to reflect radiation and a supporter surface part, wherein the optical surface part has a predetermined optical power and the supporter surface part does not have the predetermined optical power. The reflector is made by providing an axially symmetric mandrel;
shaping a part of the circumferential surface of the mandrel to form at least one inverse optical surface part that is not rotationally symmetric about the axis of the mandrel;
forming a reflector body around the mandrel; and
releasing the reflector body from the mandrel whereby the reflector body has an optical surface defined by the inverse optical surface part and a supporter surface part defined by the rest of the outer surface of the mandrel.-
公开(公告)号：US11692948B2
公开(公告)日：2023-07-04
申请号：US16963905
申请日：2019-01-08
Applicant: ASML NETHERLANDS B.V.
Inventor： Nitish Kumar , Richard Quintanilha , Markus Gerardus Martinus Maria Van Kraaij , Konstantin Tsigutkin , Willem Marie Julia Marcel Coene
IPC: G01N21/956 , G02F1/35 , G03F1/84
CPC classification number: G01N21/956 , G02F1/353 , G03F1/84 , G01N2021/95676 , G01N2201/06113
Abstract: A method of inspection for defects on a substrate, such as a reflective reticle substrate, and associated apparatuses. The method includes performing the inspection using inspection radiation obtained from a high harmonic generation source and having one or more wavelengths within a wavelength range of between 20 nm and 150 nm. Also, a method including performing a coarse inspection using first inspection radiation having one or more first wavelengths within a first wavelength range; and performing a fine inspection using second inspection radiation having one or more second wavelengths within a second wavelength range, the second wavelength range comprising wavelengths shorter than the first wavelength range.
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公开(公告)号：US20230207259A1
公开(公告)日：2023-06-29
申请号：US18088499
申请日：2022-12-23
Applicant: ASML Netherlands B.V.
Inventor： Erwin SLOT , Niels VERGEER , Vincent Sylvester KUIPER
IPC: H01J37/304 , H01J37/28
CPC classification number: H01J37/3045 , H01J37/28 , H01J2237/1501
Abstract: The present invention concerns a method of determining alignment of electron optical components in a charged particle apparatus. The charged particle apparatus comprising: an aperture array and a detector configured to detect charged particles corresponding to beamlets that pass through the corresponding apertures in the aperture array. The method comprises: scanning each beamlet in a plane of the aperture array over a portion of the aperture array in which a corresponding aperture of the aperture array is defined so that charged particles of each beamlet may pass through the corresponding aperture; detecting during the scan any charged particles corresponding to each beamlet that passes through the corresponding aperture; generating a detection pixel for each beamlet based on the detection of charged particles corresponding to each beamlet at intervals of the scan; and collecting information comprised in the detection pixel such as the intensity of charged particles.
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公开(公告)号：US11690159B2
公开(公告)日：2023-06-27
申请号：US17284060
申请日：2019-10-25
Applicant: ASML Netherlands B.V.
Inventor： Bob Rollinger , Georgiy Olegovich Vaschenko , Chirag Rajyaguru , Alexander Igorevich Ershov , Joshua Mark Lukens , Mathew Cheeran Abraham
IPC: H05G2/00
CPC classification number: H05G2/006
Abstract: Disclosed is a system for generating EUV radiation in which current flowing through target material in the orifice 320 of a nozzle in a droplet generator is controlled by providing alternate lower impedance paths for the current and/or by limiting a high frequency component of a drive signal applied to the droplet generator.
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Patent Agency Ranking
公开(公告)号：US11688694B2
公开(公告)日：2023-06-27
申请号：US16927805
申请日：2020-07-13
Applicant: ASML Netherlands B.V.
Inventor： Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/00 , H01L23/544 , G06K19/06 , G06F21/44 , G09C5/00 , G06F21/73 , H04L9/40 , G06K7/14 , H01L25/065 , H04L9/14 , H04L9/32
CPC classification number: H01L23/544 , G06F21/44 , G06F21/73 , G06K7/1417 , G06K19/06037 , G06K19/06178 , G09C5/00 , H01L25/0652 , H04L9/14 , H04L9/3271 , H04L63/08 , G06F2221/2103 , H01L2223/5444 , H01L2223/54413 , H01L2223/54433
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号：US11687007B2
公开(公告)日：2023-06-27
申请号：US17423325
申请日：2020-01-09
Applicant: ASML NETHERLANDS B.V.
Inventor： Arnaud Hubaux , Johan Franciscus Maria Beckers , Dylan John David Davies , Johan Gertrudis Cornelis Kunnen , Willem Richard Pongers , Ajinkya Ravindra Daware , Chung-Hsun Li , Georgios Tsirogiannis , Hendrik Cornelis Anton Borger , Frederik Eduard De Jong , Juan Manuel Gonzalez Huesca , Andriy Hlod , Maxim Pisarenco
IPC: G03F1/70 , G03F7/30 , G03F7/00 , G06F30/392
CPC classification number: G03F7/70508 , G03F1/70 , G03F7/70616 , G06F30/392 , G05B2219/45028 , G05B2219/45031
Abstract: A method for categorizing a substrate subject to a semiconductor manufacturing process including multiple operations, the method including: obtaining values of functional indicators derived from data generated during one or more of the multiple operations on the substrate, the functional indicators characterizing at least one operation; applying a decision model including one or more threshold values to the values of the functional indicators to obtain one or more categorical indicators; and assigning a category to the substrate based on the one or more categorical indicators.
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公开(公告)号：US11681231B2
公开(公告)日：2023-06-20
申请号：US17686586
申请日：2022-03-04
Applicant: ASML NETHERLANDS B.V.
CPC classification number: G03F7/705 , G03F7/70616 , G03F7/70641 , G03F9/7026 , G03F9/7046 , G03F9/7076 , G03F9/7084
Abstract: A method for selecting an optimal set of locations for a measurement or feature on a substrate, the method includes: defining a first candidate solution of locations, defining a second candidate solution with locations based on modification of a coordinate in a solution domain of the first candidate solution, and selecting the first and/or second candidate solution as the optimal solution according to a constraint associated with the substrate.
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209.发明授权公开(公告)号：US11675281B2
公开(公告)日：2023-06-13
申请号：US17626896
申请日：2020-06-15
Applicant: ASML NETHERLANDS B.V.
Inventor： Jin Dai , Sanjaysingh Lalbahadoersing
IPC: G03F9/00
CPC classification number: G03F9/7088 , G03F9/7076
Abstract: A resonant amplitude grating mark has a periodic structure configured to scatter radiation incident on the mark. The scattering is mainly by coupling of the incident radiation to a waveguiding mode in the periodic structure. The effective refractive indexes and lengths of portions of the periodic structure are configured to provide an optical path length of the unit cell in the direction of periodicity that essentially equals an integer multiple of a wavelength present in the radiation. The effective refractive indexes and lengths of the portions are also configured to provide an optical path length of the second portion in the direction of periodicity that is selected from 0.30 to 0.49 of the wavelength present in the spectrum of the radiation.
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公开(公告)号：US11675274B2
公开(公告)日：2023-06-13
申请号：US16484582
申请日：2018-02-21
Applicant: ASML NETHERLANDS B.V.
Inventor： Yongfa Fan , Leiwu Zheng , Mu Feng , Qian Zhao , Jen-Shiang Wang
CPC classification number: G03F7/705 , G03F1/80 , G03F7/70625 , H01L22/34
Abstract: A method involving determining an etch bias for a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a formula having a variable associated with a spatial property of the pattern or with an etch plasma species concentration of the etch step, and including a mathematical term including a natural exponential function to the power of a parameter that is fitted or based on an etch time of the etch step; and adjusting the patterning process based on the determined etch bias.
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