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    Array capacitor with resistive structure
    21.
    发明申请
    Array capacitor with resistive structure 有权
    具有电阻结构的阵列电容器

    公开(公告)号：US20060087030A1

    公开(公告)日：2006-04-27

    申请号：US10971379

    申请日：2004-10-22

    Applicant: Joel Auernheimer ,  Nicholas Holmberg ,  Kaladhar Radhakrishnan ,  Dustin Wood

    Inventor： Joel Auernheimer ,  Nicholas Holmberg ,  Kaladhar Radhakrishnan ,  Dustin Wood

    IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC classification number: H01L23/50 ,  H01G4/40 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/19106 ,  H05K1/023 ,  H01L2224/0401

    Abstract: An apparatus comprises a first plurality of contacts disposed on a first side of the apparatus, adapted to engage with a first corresponding plurality of contacts on an external integrated circuit package. The apparatus further comprises a plurality of capacitive storage structures selectively coupled to the first plurality of contacts, one or more traces, and a second plurality of contacts disposed on the first side. The second plurality of contacts are adapted to engage with a second corresponding plurality of contacts on the external integrated circuit package, wherein at least two of the second plurality of contacts are adapted to be coupled to at least a first trace of the one or more traces to form a first resistive structure.

    Abstract translation: 一种装置包括设置在装置的第一侧上的第一多个触点，适于与外部集成电路封装上的第一对应的多个触点接合。 该装置还包括选择性地耦合到第一多个触点，一个或多个迹线以及设置在第一侧上的第二多个触点的多个电容存储结构。 第二多个触点适于与外部集成电路封装上的第二对应的多个触点接合，其中第二多个触点中的至少两个触头适于耦合到至少一个或多个迹线的第一迹线 以形成第一电阻结构。

    Array capacitors with voids to enable a full-grid socket
    22.
    发明申请
    Array capacitors with voids to enable a full-grid socket 有权
    具有空隙的阵列电容器，以实现全网插座

    公开(公告)号：US20050141206A1

    公开(公告)日：2005-06-30

    申请号：US10747965

    申请日：2003-12-29

    Applicant: Kaladhar Radhakrishnan ,  Dustin Wood ,  Nicholas Holmberg

    Inventor： Kaladhar Radhakrishnan ,  Dustin Wood ,  Nicholas Holmberg

    IPC: H01G2/06 ,  H01G4/242 ,  H01L23/485 ,  H01L23/50 ,  H01L23/64 ,  H01L23/66 ,  H05K7/06

    CPC classification number: H01G4/242 ,  H01G2/06 ,  H01L23/50 ,  H01L23/66 ,  H01L24/10 ,  H01L2224/16225 ,  H01L2924/14

    Abstract: An array capacitor is described for use with an integrated circuit (IC) mounted on an IC package. The array capacitor includes a number of first conductive layers interleaved with a number of second conductive layers and a number of dielectric layers separating adjacent conductive layers. The array capacitor further includes a number of first conductive vias to electrically connect the first conductive layers and a number of second conductive vias to electrically connect the second conductive layers. The array capacitor is provided with openings which are configured to enable pins from an IC package to pass through.

    Abstract translation: 描述了与安装在IC封装上的集成电路（IC）一起使用的阵列电容器。 阵列电容器包括与多个第二导电层交错的多个第一导电层和分隔相邻导电层的多个电介质层。 阵列电容器还包括多个用于电连接第一导电层的第一导电通路和多个第二导电通孔，以电连接第二导电层。 阵列电容器设置有开口，其被配置为使得IC封装的引脚能够通过。

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