公开(公告)号：US20240068103A1

公开(公告)日：2024-02-29

申请号：US18458101

申请日：2023-08-29

Applicant: ASM IP Holding, B.V.

Inventor： Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos ,  Amir Kajbafvala ,  Arun Murali

IPC: C23C16/52 ,  C23C16/30 ,  C23C16/458 ,  C23C16/46

CPC classification number: C23C16/52 ,  C23C16/30 ,  C23C16/4584 ,  C23C16/46 ,  G01K7/04

Abstract: A chamber arrangement has a chamber body with upper and lower walls. A substrate support is arranged within an interior of the chamber body and supported for rotation about a rotation axis. An upper heater element array is supported above the upper wall and a lower heater element array supported below the lower wall. A pyrometer is supported above the upper heater element array, is optically coupled to the interior of the chamber body, and is operably connected to the upper heater element array. A thermocouple is arranged within the interior of the chamber body, is in intimate mechanical contact with the substrate support, and is operably connected to the lower heater element array. Semiconductor processing systems and material layer deposition methods are also described.

公开(公告)号：US20230324227A1

公开(公告)日：2023-10-12

申请号：US18190696

申请日：2023-03-27

Applicant: ASM IP Holding, B.V.

Inventor： Ernesto Suarez ,  Amir Kajbafvala ,  Caleb Miskin ,  Bubesh Babu Jotheeswaran ,  Alexandros Demos

IPC: C23C16/52 ,  H01L21/67 ,  C23C16/44 ,  G01J5/00

CPC classification number: G01J5/0007 ,  C23C16/4407 ,  C23C16/52 ,  H01L21/67115 ,  H01L21/67248

Abstract: A method of depositing an epitaxial material layer using pyrometer-based control. The method includes cleaning a reaction chamber of a reactor system, and, after the cleaning, providing a substrate within the reaction chamber. The method includes stabilizing a temperature of the substrate relative to a target deposition temperature. During stabilization, the heater assembly is operated with control signals to operate heaters in the heater assembly that are generated based on a direct measurement of the temperature of the substrate, such as with one to three pyrometers. The method includes, after the stabilizing of the temperature of the substrate, depositing an epitaxial material layer on a surface of the substrate. Then, for an additional number of substrates, the method involves repeating the steps of providing a substrate within the reaction chamber, stabilizing the temperature of the substrate, and depositing an epitaxial material layer on the substrate followed by another chamber cleaning.

公开(公告)号：US20230223255A1

公开(公告)日：2023-07-13

申请号：US18153272

申请日：2023-01-11

Applicant: ASM IP Holding, B.V.

Inventor： Steven Van Aerde ,  Wilco Verweij ,  Bert Jongbloed ,  Dieter Pierreux ,  Kelly Houben ,  Rami Khazaka ,  Frederick Aryeetey ,  Peter Westrom ,  Omar Elleuch ,  Caleb Miskin

IPC: H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68

CPC classification number: H01L21/0257 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L21/0262 ,  H01L21/02532

Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing the plurality of substrates to a process chamber. A plurality of deposition cycles is executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial stack comprises a plurality of epitaxial pairs, wherein the epitaxial pairs each comprises a first epitaxial layer and a second epitaxial layer, the second epitaxial layer being different from the first epitaxial layer. Each deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer. The second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer. The first deposition pulse or the second deposition pulse further comprises a provision of a dopant precursor gas to the process chamber.

公开(公告)号：US20230203706A1

公开(公告)日：2023-06-29

申请号：US18086734

申请日：2022-12-22

Applicant: ASM IP Holding B.V.

Inventor： Alexandros Demos ,  Hichem M'Saad ,  Xing Lin ,  Caleb Miskin ,  Shivaji Peddeti ,  Amir Kajbafvala

IPC: C30B25/14 ,  C30B25/12 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/08

CPC classification number: C30B25/14 ,  C30B25/12 ,  C30B25/165 ,  C30B25/186 ,  C30B29/06 ,  C30B29/08

Abstract: A reactor system may comprise a first reaction chamber and a second reaction chamber. The first and second reaction chambers may each comprise a reaction space enclosed therein, a susceptor disposed within the reaction space, and a fluid distribution system in fluid communication with the reaction space. The susceptor in each reaction chamber may be configured to support a substrate. The reactor system may further comprise a first reactant source, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the first reactant source at least partially by a first reactant shared line. The reactor system may be configured to deliver a first reactant from the first reactant source to the first reaction chamber and a second reaction chamber through the first reactant shared line.

公开(公告)号：US20230193475A1

公开(公告)日：2023-06-22

申请号：US18068399

申请日：2022-12-19

Applicant: ASM IP Holding, B.V.

Inventor： Gregory Deye ,  Caleb Miskin ,  Hichem M'Saad ,  Steven Reiter ,  Alexandros Demos ,  Fei Wang

IPC: C23F1/12

CPC classification number: C23F1/12

Abstract: A method of processing a silicon surface includes using a first radical species to remove contamination from the surface and to roughen the surface; and using a second radical species to smooth the roughened surface. Reaction systems for performing such a method, and silicon surfaces prepared using such a method, also are provided.

公开(公告)号：US20210292902A1

公开(公告)日：2021-09-23

申请号：US17184290

申请日：2021-02-24

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Caleb Miskin

IPC: C23C16/455 ,  H01L21/02 ,  C23C16/52 ,  C23C16/44 ,  C23C16/24 ,  C23C16/42 ,  C23C16/56

Abstract: A method of depositing one or more epitaxial material layers, a device structure formed using the method and a system for performing the method are disclosed. Exemplary methods include coating a surface of a reaction chamber with a precoat material, processing a number of substrates, and then cleaning the reaction chamber.

公开(公告)号：US20250137723A1

公开(公告)日：2025-05-01

申请号：US18928413

申请日：2024-10-28

Applicant: ASM IP Holding B.V.

Inventor： Felix Rabinovich ,  Terry Parde ,  Gary Urban Keppers ,  Amin Azimi ,  Alicia Almeda ,  Fauhmee Oudeif ,  Amir Kajbafvala ,  Arun Murali ,  Frederick Aryeetey ,  Alexandros Demos ,  Nayna Khosla ,  Caleb Miskin ,  Hichem M'Saad ,  Shivaji Peddeti ,  Steven Reiter

IPC: F27B17/00 ,  B28B11/02 ,  B28D1/02 ,  B28D1/14 ,  B28D1/18

Abstract: A chamber body includes a ceramic weldment having a lower wall, a sidewall, and an upper wall. The sidewall is coupled to the lower wall by a sidewall-to-lower wall weld and the upper wall is coupled to the sidewall by a sidewall-to-upper wall weld. The upper wall has an upper wall plate portion and an upper wall rib portion extending therefrom formed from a singular quartz workpiece using a subtractive manufacturing technique, the upper wall further having a unwelded ribbed region overlying the lower wall. Chamber arrangements, semiconductor processing systems and related methods of making chamber bodies and depositing material layers onto substrates supported within chamber bodies are also described.

公开(公告)号：US20250112064A1

公开(公告)日：2025-04-03

申请号：US18900352

申请日：2024-09-27

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Arun Murali ,  Caleb Miskin ,  Frederick Aryeetey ,  Alexandros Demos

IPC: H01L21/67

Abstract: A chamber arrangement for a semiconductor processing system includes a chamber body, a substrate support, a first chamber pyrometer, and a second chamber pyrometer. The chamber body has an exterior surface, a hollow interior, and the substrate support is supported for rotation within the interior of the chamber body. The first chamber pyrometer and second chamber pyrometer are optically coupled to the exterior surface of the chamber body. The first chamber pyrometer is configured to acquire a first temperature measurement at a first location on the exterior surface of the chamber body, and the second chamber pyrometer is configured to acquire a second temperature measurement at a second location on the exterior surface of the chamber body. The second location is offset from the first location to throttle temperature across the exterior surface of the chamber body between the first location and the second location. Material layer deposition methods and computer program products are also described.

公开(公告)号：US20250079167A1

公开(公告)日：2025-03-06

申请号：US18815636

申请日：2024-08-26

Applicant: ASM IP Holding B.V.

Inventor： Ernesto Suarez ,  Amir Kajbafvala ,  Arun Murali ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L29/167

Abstract: A method of forming a semiconductor structure includes seating a substrate on a substrate support arranged within a chamber arrangement of a semiconductor processing system, flowing a boron-containing precursor to the chamber arrangement at a first boron-containing precursor mass flow rate, and depositing a first portion of a first SiGe:B layer using the boron-containing precursor. Mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate, a second portion of the first SiGe:B layer is deposited using the boron-containing precursor, mass flow rate of the boron-containing precursor to the chamber arrangement is further increased to a second boron-containing precursor mass flow rate, and a second SiGe:B layer is deposited onto the first SiGe:B layer using the boron-containing precursor, the increase in the mass flow rate of the boron-containing precursor to the intermediate boron-containing precursor mass flow rate limits boron concentration at a first SiGe:B layer-to-second SiGe:B layer interface defined between the first SiGe:B layer and the second SiGe:B layer to less than a boron concentration within the second SiGe:B layer. Semiconductor processing systems and related computer program products are also provided.

公开(公告)号：US12163227B2

公开(公告)日：2024-12-10

申请号：US17684523

申请日：2022-03-02

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Yanfu Lu ,  Caleb Miskin

IPC: C23C16/458 ,  C23C16/22 ,  C23C16/52

Abstract: A method of forming a structure is provided. The method includes supporting a substrate within a reaction chamber of a semiconductor processing system, flowing a silicon precursor and a germanium precursor into the reaction chamber, and forming a silicon-germanium layer overlaying the substrate with the silicon containing precursor and the germanium precursor. Concentration of the germanium precursor within the reaction chamber is increased during the forming of the silicon-germanium layer overlaying the substrate. Methods of forming film stack structures, semiconductor device structures, and semiconductor processing systems are also described.