公开(公告)号：US20220077047A1

公开(公告)日：2022-03-10

申请号：US17529093

申请日：2021-11-17

Applicant: Intel Corporation

Inventor： Jiun Hann Sir ,  Eng Huat Goh ,  Poh Boon Khoo

IPC: H01L23/498 ,  H01L23/552 ,  H01L21/48

Abstract: A molded frame interconnect includes power, ground and signal frame interconnects in a molded mass, that encloses an integrated-circuit package precursor, which is inserted into the frame, and coupled to the frame interconnects by a build-up redistribution layer.

公开(公告)号：US11264160B2

公开(公告)日：2022-03-01

申请号：US16402467

申请日：2019-05-03

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Jiun Hann Sir ,  Min Suet Lim ,  Chin Lee Kuan ,  Siew Fong Yap

IPC: H01F27/02 ,  G05F1/56

Abstract: An electronic device comprises an air core inductor including an electronic semiconductor package including a first portion of the air core inductor internal to the electronic semiconductor package; and an electrically conductive layer arranged on a first external surface of the electronic semiconductor package and electrically connected as a second portion of the air core inductor.

公开(公告)号：US10998262B2

公开(公告)日：2021-05-04

申请号：US16384348

申请日：2019-04-15

Applicant: Intel Corporation

Inventor： Jiun Hann Sir ,  Poh Boon Khoo ,  Eng Huat Goh ,  Amruthavalli Pallavi Alur ,  Debendra Mallik

IPC: H01L23/522 ,  H01L23/00

Abstract: An embedded multi-die interconnect bridge (EMIB) is fabricated on a substrate using photolithographic techniques, and the EMIB is separated from the substrate and placed on the penultimate layer of an integrated-circuit package substrate, below the top solder-resist layer. A low Z-height of the EMIB, allows for useful trace and via real estate below the EMIB, to be employed in the package substrate.

公开(公告)号：US20210035880A1

公开(公告)日：2021-02-04

申请号：US16306884

申请日：2016-07-02

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Jiun Hann Sir ,  Min Suet Lim ,  Xi Guo

IPC: H01L23/367 ,  H01L23/498 ,  H01L25/065 ,  H01L21/48

Abstract: Electronic device package on package (POP) technology is disclosed. A POP can comprise a first electronic device package including a heat source. The POP can also comprise a second electronic device package disposed on the first electronic device package. The second electronic device package can include a substrate having a heat transfer portion proximate the heat source that facilitates heat transfer from the heat source through a thickness of the substrate. The substrate can also have an electronic component portion at least partially about the heat transfer portion that facilitates electrical communication. In addition, the POP can comprise an electronic component operably coupled to the electronic component portion.

公开(公告)号：US10772206B2

公开(公告)日：2020-09-08

申请号：US16513004

申请日：2019-07-16

Applicant: Intel Corporation

Inventor： Chee Ling Wong ,  Wil Choon Song ,  Khang Choong Yong ,  Eng Huat Goh ,  Mohd Muhaiyiddin Bin Abdullah ,  Tin Poay Chuah

IPC: H05K1/11 ,  H05K1/14 ,  H05K1/02

Abstract: A system for board-to-board interconnect is described herein. The system includes a first printed circuit board (PCB) having a first recess along a first edge of the first PCB that exposes a first solder pad on a layer of the first PCB. The system also includes a second PCB having a second recess along a second edge of the second PCB that exposes a second solder pad on a layer of the second PCB. The second recess is complementary to the first recess to allow the first PCB to mate with the second PCB. The first solder pad is aligned with the second solder pad when the first PCB is mated with the second PCB. The system additionally includes an assembly configured to electronically couple the first solder pad with the second solder pad.

公开(公告)号：US20200083157A1

公开(公告)日：2020-03-12

申请号：US16469100

申请日：2017-11-29

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Min Suet Lim ,  J-Wing Teh ,  Bok Eng Cheah

IPC: H01L23/525 ,  H01L23/48 ,  H01L25/00 ,  H01L23/00 ,  H01L27/02

Abstract: A device and method of utilizing a programmable redistribution die to redistribute the outputs of semiconductor dies. Integrated circuit packages using a programmable redistribution die are shown. Methods of creating a programmable redistribution die are shown.

公开(公告)号：US20200027639A1

公开(公告)日：2020-01-23

申请号：US16402467

申请日：2019-05-03

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Jiun Hann Sir ,  Min Suet Lim ,  Chin Lee Kuan ,  Siew Fong Yap

IPC: H01F27/02 ,  G05F1/56

Abstract: An electronic device comprises an air core inductor including an electronic semiconductor package including a first portion of the air core inductor internal to the electronic semiconductor package; and an electrically conductive layer arranged on a first external surface of the electronic semiconductor package and electrically connected as a second portion of the air core inductor.

公开(公告)号：US10388636B2

公开(公告)日：2019-08-20

申请号：US15777458

申请日：2015-12-21

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Wee Hoe ,  Khang Choong Yong ,  Ping Ping Ooi

IPC: H05K1/18 ,  H05K3/30 ,  H05K7/00 ,  H01L25/16 ,  H01L23/48 ,  H01L25/065 ,  H01L25/18 ,  H01L23/538 ,  H01L25/00 ,  H05K1/14

Abstract: Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.

公开(公告)号：US10256519B2

公开(公告)日：2019-04-09

申请号：US15396181

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Wil Choon Song ,  Khang Choong Yong ,  Min Suet Lim ,  Eng Huat Goh ,  Boon Ping Koh

IPC: H01P3/08 ,  H05K1/02 ,  H01P11/00 ,  H01P3/02 ,  H01P3/10 ,  H01P5/12

Abstract: Various embodiments disclosed relate to a circuit. The circuit includes a transceiver adapted to generate a signal. A stranded transmission line is connected to the transceiver. The signal is then transmitted through the first pair of conductive strands.

公开(公告)号：US20190103358A1

公开(公告)日：2019-04-04

申请号：US15845336

申请日：2017-12-18

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Min Suet Lim ,  Chee Kheong Yoon ,  Jia Yan Go

IPC: H01L23/538 ,  H05K1/18 ,  H01L25/18 ,  H01L25/00

Abstract: An electronic device may be a first package. The first package may include a first substrate having a first mounting surface. A first die may be coupled to the first mounting surface. A first interconnect region may be laterally spaced from the first die. The first package may be interconnected with a second package. The second package may include a second die coupled to a second mounting surface. Interconnection of the first package with the second package may establish one or more electrical communication pathways between the first package and the second package. The interconnection of the first package with the second package may interconnect the first die with the second die such that the first die and second die are in communication only through the one or more electrical communication pathways.