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    TRANSISTOR AND METHODS OF FORMING TRANSISTORS
    21.
    发明申请
    TRANSISTOR AND METHODS OF FORMING TRANSISTORS 有权

    公开(公告)号：US20210043767A1

    公开(公告)日：2021-02-11

    申请号：US16536544

    申请日：2019-08-09

    Applicant: Micron Technology, Inc.

    Inventor： Manuj Nahar ,  Michael Mutch

    IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/36 ,  H01L29/06 ,  H01L29/04 ,  H01L29/66 ,  H01L21/02

    Abstract: A transistor comprises a top source/drain region, a bottom source/drain region, and a channel region vertically between the top and bottom source/drain regions. A gate is operatively laterally-adjacent the channel region. The top source/drain region, the bottom source/drain region, and the channel region respectively have crystal grains and grain boundaries between immediately-adjacent of the crystal grains. At least one of the bottom source/drain region and the channel region has an internal interface there-within between the crystal grains that are above the internal interface and the crystal grains that are below the internal interface. At least some of the crystal grains that are immediately-above the internal interface physically contact at least some of the crystal grains that are immediately-below the internal interface. All of the grain boundaries that are between immediately-adjacent of the physically-contacting crystal grains that are immediately-above and that are immediately-below the interface align relative one another. The internal interface comprises at least one of (a) and (b), where (a): conductivity-modifying dopant concentration immediately-above the internal interface is lower than immediately-below the internal interface and (b): a laterally-discontinuous insulative oxide. Other embodiments, including method, are disclosed.

    METHODS OF FORMING SEMICONDUCTOR STRUCTURES
    24.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR STRUCTURES 审中-公开

    公开(公告)号：US20200075713A1

    公开(公告)日：2020-03-05

    申请号：US16121966

    申请日：2018-09-05

    Applicant: Micron Technology, Inc.

    Inventor： Michael Mutch ,  Manuj Nahar ,  Wayne I. Kinney

    IPC: H01L29/04 ,  H01L21/02 ,  H01L21/324 ,  H01L29/161

    Abstract: A method includes forming a semiconductor structure. The structure includes a first material, a blocking material, a second material in an amorphous form, and a third material in an amorphous form. The blocking material is disposed between the first material and the second material. At least the second material and the third material each comprise silicon and/or germanium. The structure is exposed to a temperature above a crystallization temperature of the third material and below a crystallization temperature of the second material. Semiconductor structures, memory devices, and systems are also disclosed.

    Methods of Forming Crystalline Semiconductor Material, and Methods of Forming Transistors
    25.
    发明申请
    Methods of Forming Crystalline Semiconductor Material, and Methods of Forming Transistors 审中-公开

    公开(公告)号：US20200066513A1

    公开(公告)日：2020-02-27

    申请号：US16112410

    申请日：2018-08-24

    Applicant: Micron Technology, Inc.

    Inventor： Manuj Nahar ,  Darwin Franseda Fan ,  Junting Liu-Norrod ,  Michael Mutch

    IPC: H01L21/02 ,  H01L21/306 ,  H01L29/66 ,  H01L29/78 ,  H01L27/108 ,  C23C16/24 ,  C23C16/06 ,  C23C16/56

    Abstract: Some embodiments include a method of forming crystalline semiconductor material. A template is provided to have a polycrystalline region along a surface. Semiconductor material is deposited along the surface under conditions which grow crystalline semiconductor structures from grains of the polycrystalline region. The deposition is conducted at a temperature of less than or equal to 500° C. Some embodiments include a method of forming a transistor. A template is provided to have a polycrystalline region along a surface. Semiconductor material is deposited along the surface under conditions which grow crystalline semiconductor structures from grains of the polycrystalline region. The semiconductor material includes germanium. The crystalline semiconductor structures are doped to form a configuration having a first portion over a second portion. Insulative material is formed adjacent the second portion. A transistor gate is formed along the insulative material.

    Ferroelectric Capacitor, Ferroelectric Field Effect Transistor, and Method Used in Forming an Electronic Device Comprising Conductive Material and Ferroelectric Material
    27.
    发明申请
    Ferroelectric Capacitor, Ferroelectric Field Effect Transistor, and Method Used in Forming an Electronic Device Comprising Conductive Material and Ferroelectric Material 有权

    公开(公告)号：US20250118493A1

    公开(公告)日：2025-04-10

    申请号：US18985584

    申请日：2024-12-18

    Applicant: Micron Technology, Inc.

    Inventor： Manuj Nahar ,  Ashonita A. Chavan

    IPC: H10D30/69 ,  H10B51/30 ,  H10B53/30 ,  H10D1/66 ,  H10D64/68

    Abstract: A method used in forming an electronic device comprising conductive material and ferroelectric material comprises forming a composite stack comprising multiple metal oxide-comprising insulator materials. At least one of the metal oxide-comprising insulator materials is between and directly against non-ferroelectric insulating materials. The multiple metal oxide-comprising insulator materials are of different composition from that of immediately-adjacent of the non-ferroelectric insulating materials. The composite stack is subjected to a temperature of at least 200° C. After the subjecting, the composite stack comprises multiple ferroelectric metal oxide-comprising insulator materials at least one of which is between and directly against non-ferroelectric insulating materials. After the subjecting, the composite stack is ferroelectric. Conductive material is formed and that is adjacent the composite stack. Devices are also disclosed.

    DEVICES COMPRISING CRYSTALLINE MATERIALS
    29.
    发明申请
    DEVICES COMPRISING CRYSTALLINE MATERIALS 有权

    公开(公告)号：US20230074063A1

    公开(公告)日：2023-03-09

    申请号：US18050772

    申请日：2022-10-28

    Applicant: Micron Technology, Inc.

    Inventor： Michael Mutch ,  Manuj Nahar ,  Wayne I. Kinney

    IPC: H01L29/04 ,  H01L21/02 ,  H01L29/161 ,  H01L21/324

    Abstract: A method includes forming a semiconductor structure. The structure includes a first material, a blocking material, a second material in an amorphous form, and a third material in an amorphous form. The blocking material is disposed between the first material and the second material. At least the second material and the third material each comprise silicon and/or germanium. The structure is exposed to a temperature above a crystallization temperature of the third material and below a crystallization temperature of the second material. Semiconductor structures, memory devices, and systems are also disclosed.

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