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21.发明申请公开(公告)号：US20160041870A1
公开(公告)日：2016-02-11
申请号：US14454537
申请日：2014-08-07
Applicant: Pure Storage, Inc.
Inventor： John D. Davis , John Hayes , Zhangxi Tan , Hari Kannan , Nenad Miladinovic
CPC classification number: G06F11/1048 , H03M13/1102 , H03M13/1515 , H03M13/353 , H03M13/373 , H03M13/3761
Abstract: A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.
Abstract translation: 提供了一种用于存储群集中的可调纠错的方法。 该方法包括基于每个闪存封装每闪存芯片每闪存平面每个闪存平面来确定存储集群中的多个存储节点中的每一个的非易失性固态存储单元的非易失性存储器的健康状况 闪存块或每个闪存页面。 确定由存储集群执行。 多个存储节点被容纳在将存储节点耦合作为存储簇的机箱中。 该方法包括基于非易失性存储器的健康状况来调整跨越多个存储节点的擦除编码，并通过擦除编码在整个多个存储节点中分发用户数据。 如果多个存储节点中的任何一个无法访问，则可以通过来自多个存储节点的其余部分的擦除编码来访问用户数据。
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公开(公告)号：US20160041869A1
公开(公告)日：2016-02-11
申请号：US14454531
申请日：2014-08-07
Applicant: Pure Storage, Inc.
Inventor： John D. Davis , John Hayes , Zhangxi Tan , Hari Kannan , Nenad Miladinovic
CPC classification number: G06F11/1012 , G06F11/1008 , G06F12/0246 , G06F12/0646 , G06F12/08 , G11C29/70 , G11C29/76 , G11C29/765 , G11C29/88 , G11C29/883 , G11C29/886 , H03M13/05 , H03M13/09 , H03M13/1102 , H03M13/1515 , H03M13/3761
Abstract: A method of failure mapping is provided. The method includes distributing user data throughout a plurality of storage nodes through erasure coding, wherein the plurality of storage nodes are housed within a chassis that couples the storage nodes as a storage cluster. Each of the plurality of storage nodes has a non-volatile solid-state storage with flash memory or other types of non-volatile memory and the user data is accessible via the erasure coding from a remainder of the plurality of storage nodes in event of two of the plurality of storage nodes being unreachable. The method includes determining that a non-volatile memory block in the memory has a defect and generating a mask that indicates the non-volatile memory block and the defect. The method includes reading from the non-volatile memory block with application of the mask, wherein the reading and the application of the mask are performed by the non-volatile solid-state storage.
Abstract translation: 提供了故障映射的方法。 该方法包括通过擦除编码在多个存储节点中分发用户数据，其中多个存储节点被容纳在将存储节点耦合作为存储簇的机箱中。 多个存储节点中的每一个具有带有闪速存储器或其它类型的非易失性存储器的非易失性固态存储器，并且在两个存储节点中存在多个存储节点的剩余部分，可以经由擦除编码访问用户数据 的多个存储节点不可达。 该方法包括确定存储器中的非易失性存储器块具有缺陷并产生指示非易失性存储器块和缺陷的掩码。 该方法包括通过应用掩模从非易失性存储器块读取，其中掩模的读取和应用由非易失性固态存储器执行。
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公开(公告)号：US20250156286A1
公开(公告)日：2025-05-15
申请号：US19021728
申请日：2025-01-15
Applicant: PURE STORAGE, INC.
Inventor： Robert Lee , Hari Kannan
Abstract: A storage system with storage drives and a processing device establishes resiliency groups of storage system resources. The storage system determines an explicit trade-off between data survivability over resource failures and data capacity efficiency, for the resiliency groups. Responsive to adding at least one storage drive, the storage system establishes re-formed resiliency groups according to the explicit trade-off, without decreasing data survivability. The storage system may bias to have more and narrower resiliency groups to increase mean time to data loss.
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公开(公告)号：US20240143439A1
公开(公告)日：2024-05-02
申请号：US17992452
申请日：2022-11-22
Applicant: Pure Storage, Inc.
Inventor： John D. Davis , John Hayes , Zhangxi Tan , Hari Kannan , Nenad Miladinovic
CPC classification number: G06F11/1048 , H03M13/353 , H03M13/373 , H03M13/3761 , H03M13/1102
Abstract: A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.
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公开(公告)号：US11869583B2
公开(公告)日：2024-01-09
申请号：US17704747
申请日：2022-03-25
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Peter E. Kirkpatrick
CPC classification number: G11C11/5628 , G06F3/061 , G06F3/0614 , G06F3/0656 , G06F3/0679 , G06F12/0246 , G11C16/10 , G11C16/102 , G06F2212/7203
Abstract: A method for page writes for triple or higher level cell flash memory is provided. The method includes receiving data in a storage system, from a client that is agnostic of page write requirements for triple or higher level cell flash memory, wherein the page write requirements specify an amount of data and a sequence of writing data for a set of pages to assure read data coherency for the set of pages. The method includes accumulating the received data, in random-access memory (RAM) in the storage system to satisfy the page write requirements for the triple or higher level cell flash memory in the storage system. The method includes writing at least a portion of the accumulated data in accordance with the page write requirements, from the RAM to the triple level cell, or the higher level cell, flash memory in the storage system as an atomic write.
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Patent Agency Ranking
公开(公告)号：US11706895B2
公开(公告)日：2023-07-18
申请号：US15213447
申请日：2016-07-19
Applicant: Pure Storage, Inc.
Inventor： John Davis , Hari Kannan , Robert Lee , Yuhong Mao
IPC: H05K7/14
CPC classification number: H05K7/1498
Abstract: A storage system that supports independent scaling of compute resources and storage resources, the storage system including: one or more chassis, wherein each chassis includes a plurality of slots, each slot configured to receive a blade; a plurality of compute resources; a plurality of storage resources; a plurality of blades, where each blade includes at least one compute resource or at least one storage resource and each of the storage resources may be directly accessed by each of the compute resources without utilizing an intermediate compute resource; a first power domain configured to deliver power to one or more of the compute resources; and a second power domain configured to deliver power to the storage resources, wherein the first power domain and the second power domain can be independently operated.
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公开(公告)号：US11614893B2
公开(公告)日：2023-03-28
申请号：US17159796
申请日：2021-01-27
Applicant: PURE STORAGE, INC.
Inventor： Hari Kannan , Boris Feigin , Ying Gao , John Colgrove
IPC: G06F3/06 , G06F11/07 , G06F11/10 , G06F11/34 , G06F12/0804 , G06F12/0866 , G06F11/30
Abstract: A first set of physical units of a storage device of a storage system is selected for performance of low latency access operations, wherein other access operations are performed by remaining physical units of the storage device. A determination as to whether a triggering event has occurred that causes a selection of a new set of physical units of the storage device for the performance of low latency access operations is made. A second set of physical units of the storage device is selected for the performance of low latency access operations upon determining that the triggering event has occurred.
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公开(公告)号：US20220357857A1
公开(公告)日：2022-11-10
申请号：US17867543
申请日：2022-07-18
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Ronald Karr
IPC: G06F3/06
Abstract: A storage system has a resiliency scheme to enhance storage system performance. The storage system composes a RAID stripe. The storage system mixes an ordering of portions of the RAID stripe, based on reliability differences across zones of the solid-state memory. Each zone of the solid state memory corresponds to a type of solid state memory. The storage system writes the mixed ordering RAID stripe across the solid-state memory.
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公开(公告)号：US20220206696A1
公开(公告)日：2022-06-30
申请号：US17570340
申请日：2022-01-06
Applicant: PURE STORAGE, INC.
Inventor： Ying Gao , Boris Feigin , Hari Kannan , Igor Ostrovsky , Jeffrey Tofano , Svitlana Tumanova
IPC: G06F3/06
Abstract: A storage system has a first memory, a second memory that include solid-state storage memory, and a processing device. The processing device is to select a mode for each portion of data to be written. Selection of the mode is based at least on size of the portion of data. Selection of the mode is from among modes that include a first mode of writing the portion of data in mirrored RAID form to the first memory for later transfer from the first memory to the second memory, a second mode of writing the portion of data in parity-based RAID form to the first memory for later transfer from the first memory to the second memory, and a third mode of writing the portion of data to the second memory, bypassing the first memory. The processing device is to handle portions of data to be written according to such selection.
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公开(公告)号：US20220156152A1
公开(公告)日：2022-05-19
申请号：US17581340
申请日：2022-01-21
Applicant: PURE STORAGE, INC.
Inventor： Ying Gao , Hari Kannan , Boris Feigin , Robert Lee
Abstract: A storage system determines a size of a portion of data to be written as a RAID stripe across storage devices. The storage system determines aspects of the RAID stripe. Aspects of the RAID stripe include a data segment size for shards of the RAID stripe, a type of RAID, a width of the RAID stripe, a level of redundancy of the RAID stripe, and a selection of members of the storage devices. All of the determining for the aspects of the RAID stripe are on a dynamic basis and based at least on the size of the portion of data. The storage system writes the portion of data according to the determined aspects of the RAID stripe across the selected members of the storage devices.
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