公开(公告)号：US10665662B2

公开(公告)日：2020-05-26

申请号：US16267142

申请日：2019-02-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee Jung ,  HyungSang Park ,  SungSoo Kim

IPC: H01L49/02 ,  H05K1/18 ,  H01L23/538 ,  H01L21/683 ,  H01L23/00 ,  H01L23/498 ,  H01L23/50 ,  H01L21/48 ,  H05K3/46

Abstract: A semiconductor device comprises a first conductive layer. A second conductive layer is formed over the first conductive layer. A semiconductor component is disposed over the first conductive layer. The second conductive layer lies in a plane between a top surface of the semiconductor component and a bottom surface of the semiconductor component. A third conductive layer is formed over the semiconductor component opposite the first conductive layer. The semiconductor device includes a symmetrical structure. A first insulating layer is formed between the first conductive layer and semiconductor component. A second insulating layer is formed between the semiconductor component and third conductive layer. A height of the first insulating layer between the first conductive layer and semiconductor component is between 90% and 110% of a height of the second insulating layer between the semiconductor component and third conductive layer. The semiconductor component includes a passive device.

公开(公告)号：US20180053819A1

公开(公告)日：2018-02-22

申请号：US15797107

申请日：2017-10-30

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee Jung ,  HyungSang Park ,  SungSoo Kim

IPC: H01L49/02 ,  H01L23/00 ,  H01L21/683 ,  H01L23/538

CPC classification number: H01L28/40 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/25 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83005 ,  H01L2224/92144 ,  H05K1/185 ,  H05K3/4664 ,  H05K2201/10015

Abstract: A semiconductor device comprises a first conductive layer. A second conductive layer is formed over the first conductive layer. A semiconductor component is disposed over the first conductive layer. The second conductive layer lies in a plane between a top surface of the semiconductor component and a bottom surface of the semiconductor component. A third conductive layer is formed over the semiconductor component opposite the first conductive layer. The semiconductor device includes a symmetrical structure. A first insulating layer is formed between the first conductive layer and semiconductor component. A second insulating layer is formed between the semiconductor component and third conductive layer. A height of the first insulating layer between the first conductive layer and semiconductor component is between 90% and 110% of a height of the second insulating layer between the semiconductor component and third conductive layer. The semiconductor component includes a passive device.

公开(公告)号：US12266615B2

公开(公告)日：2025-04-01

申请号：US18174790

申请日：2023-02-27

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoungHee Park ,  JinHee Jung ,  OMin Kwon ,  JiWon Lee ,  YuJeong Jang

IPC: H01L23/552 ,  H01L21/033 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.

公开(公告)号：US20240332207A1

公开(公告)日：2024-10-03

申请号：US18193894

申请日：2023-03-31

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49822

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A magnetic film material is formed over the encapsulant. The magnetic film material may extend down a side surface of the semiconductor device. The magnetic film material is subject to laser spike annealing in a magnetic field. A shielding layer is formed over the magnetic film material. The laser spike annealing of the magnetic film material in the magnetic field can be done after forming the shielding layer. The shielding layer may extend down a side surface of the semiconductor device. A first magnet is disposed on a first side of the semiconductor device. A second magnet is disposed on a second side of the semiconductor device opposite the first side of the semiconductor device.

公开(公告)号：US11923260B2

公开(公告)日：2024-03-05

申请号：US18154993

申请日：2023-01-16

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee Jung ,  ChangOh Kim

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/60 ,  H01L23/66

CPC classification number: H01L23/31 ,  H01L21/565 ,  H01L23/60 ,  H01L23/66

Abstract: A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.

公开(公告)号：US20240021536A1

公开(公告)日：2024-01-18

申请号：US17812339

申请日：2022-07-13

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung ,  OMin Kwon

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/66 ,  H01L21/4853 ,  H01L21/565 ,  H01L2223/6677

Abstract: A semiconductor device has a substrate and encapsulant deposited over the substrate. An electrical connector is disposed over the substrate outside the encapsulant. An antenna can be formed over the substrate. A first shielding material is disposed over a portion of the encapsulant without covering the electrical connector with the first shielding material. The first shielding material is disposed over the portion of the encapsulant and the portion of the substrate using a direct jet printer. A cover is disposed over the electrical connector. A second shielding material is disposed over the encapsulant to prevent the second shielding material from reaching the electrical connector. The second shielding material overlaps the first shielding material and covers a side surface of the encapsulant and a side surface of the substrate. The cover is removed to expose the electrical connector free of shielding material.

公开(公告)号：US20240014093A1

公开(公告)日：2024-01-11

申请号：US17810901

申请日：2022-07-06

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung ,  OMin Kwon ,  HeeSoo Lee

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/433

CPC classification number: H01L23/3672 ,  H01L23/373 ,  H01L23/4334

Abstract: A semiconductor device has a first substrate and electrical component disposed over the first substrate. A graphene layer is disposed over the electrical component, and a thermal interface material is disposed between the graphene layer. A heat sink is disposed over the thermal interface material. The graphene layer, in combination with the thermal interface material, aids with the heat transfer between the electrical component and heat sink. The graphene layer may be disposed over a second substrate made of copper. An encapsulant is deposited over the first substrate and around the electrical component and graphene substrate. The thermal interface material and heat sink may extend over the encapsulant. The heat sink can have vertical or angled extensions from the horizontal portion of the heat sink down to the substrate. The heat sink can extend over multiple modules.

公开(公告)号：US11862572B2

公开(公告)日：2024-01-02

申请号：US18161693

申请日：2023-01-30

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoungHee Park ,  SeongHwan Park ,  JinHee Jung

IPC: H01L23/552 ,  H01L23/66 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H01Q1/22

CPC classification number: H01L23/552 ,  H01L21/486 ,  H01L21/56 ,  H01L23/31 ,  H01L23/66 ,  H01Q1/2283

Abstract: A semiconductor device has a first package layer. A first shielding layer is formed over the first package layer. The first shielding layer is patterned to form a redistribution layer. An electrical component is disposed over the redistribution layer. An encapsulant is deposited over the electrical component. A second shielding layer is formed over the encapsulant. The second shielding layer is patterned. The patterning of the first shielding layer and second shielding layer can be done with a laser. The second shielding layer can be patterned to form an antenna.

公开(公告)号：US20230420382A1

公开(公告)日：2023-12-28

申请号：US17808613

申请日：2022-06-24

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung ,  YoungCheol Kim

IPC: H01L23/552 ,  H01L25/16 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L25/165 ,  H01L24/96 ,  H01L23/49816 ,  H01L24/16 ,  H01L2224/16235 ,  H01L2924/3025 ,  H01L24/97

Abstract: A semiconductor device has a substrate. A first electrical component and second electrical component are disposed over the substrate. A conductive pillar is formed over the substrate between the first electrical component and second electrical component. A first shielding layer is formed over the first electrical component and conductive pillar by jet printing conductive material. A second shielding layer is formed over the first electrical component and second electrical component by sputtering, spraying, or plating conductive material. An insulating layer is optionally formed between the first shielding layer and second shielding layer by jet printing insulating material over the first shielding layer.

公开(公告)号：US20230369241A1

公开(公告)日：2023-11-16

申请号：US18359688

申请日：2023-07-26

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  JinHee Jung ,  JiWon Lee ,  YuJeong Jang

IPC: H01L23/552 ,  H01L23/31 ,  H01L25/065 ,  H01L21/3213

CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L25/0655 ,  H01L21/32131

Abstract: A semiconductor device is formed by providing a semiconductor package including a shielding layer and forming a slot in the shielding layer using a laser. The laser is turned on and exposed to the shielding layer with a center of the laser disposed over a first point of the shielding layer. The laser is moved in a loop while the laser remains on and exposed to the shielding layer. Exposure of the laser to the shielding layer is stopped when the center of the laser is disposed over a second point of the shielding layer. A distance between the first point and the second point is approximately equal to a radius of the laser.