公开(公告)号：US10438880B2

公开(公告)日：2019-10-08

申请号：US16078331

申请日：2017-02-24

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Peter Enoksson ,  Vincent Desmaris ,  Rickard Andersson

IPC: H01L23/34 ,  H01L23/498 ,  H01G4/35 ,  H01L23/50 ,  H01L21/48 ,  H01L23/14 ,  H01L23/538

Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.

公开(公告)号：US20190267345A1

公开(公告)日：2019-08-29

申请号：US16094595

申请日：2017-05-03

Applicant: Smoltek AB.

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Vincent Desmaris ,  Muhammad Amin Saleem

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48

Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.

公开(公告)号：US09114993B2

公开(公告)日：2015-08-25

申请号：US14489903

申请日：2014-09-18

Applicant: Smoltek AB

Inventor： Jonas T. Berg ,  Vincent Desmaris ,  Mohammad Shafiqul Kabir ,  Muhammad Amin Saleem ,  David Brud

IPC: H01L23/48 ,  C01B31/02 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/768 ,  H01L29/06 ,  H01L29/66 ,  H01L23/498 ,  H01L21/02

CPC classification number: C23C16/26 ,  B82Y10/00 ,  B82Y40/00 ,  C01B32/15 ,  C23C16/503 ,  G02B6/26 ,  H01B13/0026 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/4871 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/3677 ,  H01L23/3737 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/53276 ,  H01L29/0665 ,  H01L29/66439 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.

Abstract translation: 公开了一种制造一种或多种纳米结构的方法，所述方法包括：在衬底的上表面上沉积导电层; 在导电层上沉积图案化的催化剂层; 在催化剂层上生长一个或多个纳米结构; 并且选择性地去除所述一个或多个纳米结构之间和周围的导电层。 还公开了一种包括衬底的器件，其中衬底包括由一个或多个绝缘区域隔开的一个或多个暴露的金属岛; 设置在所述基板上的导电助垫，其覆盖所述一个或多个暴露的金属岛或绝缘区域中的至少一些; 设置在导电助听器上的催化剂层; 以及设置在催化剂层上的一个或多个纳米结构。

公开(公告)号：US20130334704A1

公开(公告)日：2013-12-19

申请号：US13961532

申请日：2013-08-07

Applicant: Smoltek AB

Inventor： Jonas S. T. Berg ,  Vincent Desmaris ,  Mohammad Shafiqul Kabir ,  Muhammad Amin Saleem ,  David Brud

IPC: H01L21/768 ,  H01L23/498

CPC classification number: C23C16/26 ,  B82Y10/00 ,  B82Y40/00 ,  C01B32/15 ,  C23C16/503 ,  G02B6/26 ,  H01B13/0026 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/4871 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/3677 ,  H01L23/3737 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/53276 ,  H01L29/0665 ,  H01L29/66439 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.