Method for electrically connecting terminals to each other
    22.
    发明授权
    Method for electrically connecting terminals to each other 失效
    将端子彼此电连接的方法

    公开(公告)号:US6101708A

    公开(公告)日:2000-08-15

    申请号:US859258

    申请日:1997-05-20

    Abstract: A connection terminal portion of a substrate and a terminal portion of an external circuit substrate or a terminal portion of a part are electrically connected together using an anisotropic electrically conducting film. A structure in which a first substrate having a connection terminal portion and a second substrate having a connection terminal portion or a connection terminal portion of a part are connected together with an anisotropic electrically conducting adhesive containing electrically conducting particles, wherein the thickness of the electrically conducting film provided for the connection terminal of the first substrate, the second substrate or the part is smaller than the diameter of the electrically conducting particles. The invention is further concerned with a method of accomplishing the electrical connection.

    Abstract translation: 基板的连接端子部分和外部电路基板的端子部分或部分的端子部分使用各向异性导电膜电连接在一起。 一种结构,其中具有连接端子部分的第一基板和具有连接端子部分或部分的连接端子部分的第二基板与包含导电颗粒的各向异性导电粘合剂连接在一起,其中导电 提供给第一基板,第二基板或部分的连接端子的薄膜小于导电颗粒的直径。 本发明还涉及一种完成电连接的方法。

    Method and apparatus for reducing cold joint defects in flip chip products
    30.
    发明授权
    Method and apparatus for reducing cold joint defects in flip chip products 失效
    用于减少倒装芯片产品冷接点缺陷的方法和装置

    公开(公告)号:US07396752B1

    公开(公告)日:2008-07-08

    申请号:US10986398

    申请日:2004-11-10

    Applicant: Albert E. Puah

    Inventor: Albert E. Puah

    Abstract: An electronic device is disclosed with solder bumps treated to improve coplanarity and reduce the effects of poor solder bump surface quality, and a method of constructing same. An electronic device is placed against a flat plate and a controlled amount of force is applied to press together the electronic device and flat plate. The taller solder bumps are compressed, reducing non-coplanarity of the solder bumps. The controlled amount of force exposes the bulk material of a solder bump coated with a foreign material. A layer of abrasive, electroconductive particles that is harder than the foreign material, dispersed on the surface of the flat plate and firmly held in place, may also puncture the foreign material and expose the solder bump bulk material when the controlled amount of force is applied.

    Abstract translation: 公开了一种电子器件,其具有被处理以改善共面性并减少不良焊料凸起表面质量的影响的焊料凸块及其构造方法。 将电子装置放置在平板上,并施加受控的力以将电子装置和平板压在一起。 较高的焊料凸块被压缩,从而降低焊料凸块的非共面性。 受控的力暴露了涂有异物的焊料凸块的散装材料。 分散在平板表面并牢固地固定就位的比异物硬的研磨性导电颗粒层也可以在施加受控的力量时刺穿异物并暴露焊料块体材料 。

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