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    PRINTED CIRCUIT BOARD
    21.
    发明申请
    PRINTED CIRCUIT BOARD 审中-公开
    印刷电路板

    公开(公告)号：US20130170167A1

    公开(公告)日：2013-07-04

    申请号：US13821800

    申请日：2011-09-16

    Applicant: Toyohide Miyazaki ,  Kenji Koyama

    Inventor： Toyohide Miyazaki ,  Kenji Koyama

    IPC: H05K1/02

    CPC classification number: H05K1/0216 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/1205 ,  H01L2924/14 ,  H05K1/0225 ,  H05K1/0233 ,  H05K1/0243 ,  H05K1/162 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09663 ,  H01L2924/00

    Abstract: A multi-layer printed circuit board includes an embedded capacitor substrate composed of a power source conductor layer and a ground conductor layer, the layers being disposed close to each other. The power source conductor layer has a first power source plane to supply power to a circuit element, and a second power source plane that is separated from the first power source plane by a gap and functions as a main power source. The first power source plane is partially connected to the second power source plane by a connecting line. The ground conductor layer has an opening at a position overlapping with a projected image when the connecting line is projected on the ground conductor layer. This structure suppresses propagation of the noise caused at the circuit element and reduces radiation noise in the printed circuit board.

    Abstract translation: 多层印刷电路板包括由电源导体层和接地导体层构成的嵌入式电容器基板，这些层彼此靠近设置。 电源导体层具有向电路元件供电的第一电源面，以及与第一电源面间隔离并作为主电源的第二电源面。 第一电源平面通过连接线部分地连接到第二电源平面。 当连接线投射在接地导体层上时，接地导体层在与投影图像重叠的位置处具有开口。 该结构抑制在电路元件处产生的噪声的传播并且降低印刷电路板中的辐射噪声。

    Multi-layer Printed Circuit Board With Power Plane Islands To Isolate Noise Coupling
    22.
    发明申请
    Multi-layer Printed Circuit Board With Power Plane Islands To Isolate Noise Coupling 审中-公开
    多层印刷电路板与动力平面岛隔离噪声耦合

    公开(公告)号：US20130021739A1

    公开(公告)日：2013-01-24

    申请号：US13187074

    申请日：2011-07-20

    Applicant: Tae Hong Kim ,  Sang Y. Lee

    Inventor： Tae Hong Kim ,  Sang Y. Lee

    IPC: G06F1/16 ,  H05K3/36 ,  H05K1/11

    CPC classification number: H05K1/0227 ,  H05K1/0243 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09345 ,  H05K2201/09663 ,  Y10T29/49126

    Abstract: Multi-layer printed circuit boards (PCB) with power plane islands to isolate noise coupling are provided. In addition, methods and computer program products for manufacturing multi-layer PCBs with power plane islands to isolate noise coupling are provided. Embodiments include a PCB comprising a first power plane coupled to a power supply, the first power plane within a layer of the PCB; a second power plane and a third power plane, the second power plane and the third power plane within another layer of the PCB, the second power plane and the third power plane separated from each other within the other layer of the PCB; and a via bridge structure connecting the first power plane to both the second power plane and the third power plane.

    Abstract translation: 提供了具有电源平面岛以隔离噪声耦合的多层印刷电路板（PCB）。 此外，还提供了用于制造具有电源平面岛以隔离噪声耦合的多层PCB的方法和计算机程序产品。 实施例包括PCB，其包括耦合到电源的第一电力平面，PCB内的第一电力平面; 第二电力平面和第三电力平面，PCB的另一层内的第二电力平面和第三电力平面，第二电力平面和第三电力平面在PCB的另一层内彼此分离; 以及将第一电力平面连接到第二电力平面和第三电力平面的通孔桥结构。

    Continuously Referencing Signals Over Multiple Layers in Laminate Packages
    24.
    发明申请
    Continuously Referencing Signals Over Multiple Layers in Laminate Packages 有权
    连续引用层叠软件包中多层信号

    公开(公告)号：US20120174047A1

    公开(公告)日：2012-07-05

    申请号：US13417879

    申请日：2012-03-12

    Applicant: Francesco Preda ,  Lloyd A. Walls

    Inventor： Francesco Preda ,  Lloyd A. Walls

    IPC: G06F17/50

    CPC classification number: H01L23/50 ,  H01L23/5383 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/10522 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/0401

    Abstract: A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package.

    Abstract translation: 用于在层压封装中连续地参考多层信号的机构提供了用于从一层到另一层的信号的连续路径，同时使用用于封装的所有区域的理想电压基准并且仍避免电压基准中的不连续性。 参考平面调整引擎分析封装设计，并为封装的所有区域（包括特定芯片裸片下的区域）和不在芯片裸片下的区域识别理想的顶层平面。 参考平面调整引擎然后修改封装设计以重新定位层之间的接地层，源电压平面，信号面和通孔，以保持连续的电压基准，而不管顶层如何。 参考平面调整引擎将所得到的混合电压平面封装设计提供给设计分析引擎。 包装制造系统制造包装。

    PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME
    25.
    发明申请
    PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME 审中-公开
    印刷电路板及其制造方法

    公开(公告)号：US20110297427A1

    公开(公告)日：2011-12-08

    申请号：US13151108

    申请日：2011-06-01

    Applicant: Dong Hwan Lee ,  Dae Hyung You ,  Sang Hyuk Son

    Inventor： Dong Hwan Lee ,  Dae Hyung You ,  Sang Hyuk Son

    IPC: H05K7/20 ,  H05K3/00

    CPC classification number: H05K3/4602 ,  H05K3/4644 ,  H05K2201/09345 ,  H05K2203/175 ,  Y10T29/49124

    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes a metal layer divided into a plurality of regions; a build-up layer formed on at least one surface of the metal layer; and a penetrating part penetrating through the metal layer including the build-up layer and electrically separating each of the plurality of regions of the metal layer. The metal layer is configured of the plurality of regions, the ground layers and the power layers that have different functions, thereby making it possible to be thin, and the plurality of regions of the metal layer are connected through a bridge and are then penetrated through by the penetrating part, thereby making it possible to easily manufacture the printed circuit board.

    Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括划分成多个区域的金属层; 形成在所述金属层的至少一个表面上的堆积层; 以及穿透包括所述积聚层的所述金属层并且电分离所述金属层的所述多个区域中的每一个的穿透部分。 金属层由具有不同功能的多个区域，接地层和功率层构成，从而可以变薄，金属层的多个区域通过桥连接，然后穿过 通过穿透部分，从而可以容易地制造印刷电路板。

    Method to reduce module inductance
    26.
    发明授权
    Method to reduce module inductance 失效
    降低模块电感的方法

    公开(公告)号：US07676911B2

    公开(公告)日：2010-03-16

    申请号：US11673279

    申请日：2007-02-09

    Applicant: Fred Flett

    Inventor： Fred Flett

    IPC: H01R43/00

    CPC classification number: H01L25/072 ,  H01L2223/665 ,  H01L2924/0002 ,  H02M7/003 ,  H05K1/0215 ,  H05K1/0237 ,  H05K1/0306 ,  H05K7/1432 ,  H05K2201/09345 ,  H05K2201/10446 ,  H05K2201/10636 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49002 ,  Y10T29/49009 ,  Y10T29/49117 ,  Y10T29/49126 ,  H01L2924/00

    Abstract: A DC bus for use in a power module has a positive DC conductor bus plate parallel with a negative DC conductor bus plate. One or more positive leads are connected to the positive bus and are connectable to a positive terminal of a power source. One or more negative leads are connected to the negative bus and are connectable to a negative terminal of a power source. The DC bus has one or more positive connections fastenable from the positive bus to the high side of a power module. The DC bus also has one or more negative connections fastenable from the negative bus to the low side of the power module. The positive bus and negative bus permit counter-flow of currents, thereby canceling magnetic fields and their associated inductances, and the positive and negative bus are connectable to the center portion of a power module.

    Abstract translation: 用于电源模块的直流母线具有与负直流导体总线板平行的正直流导体母线板。 一个或多个正极引线连接到正极母线，并且可连接到电源的正极端子。 一个或多个负极引线连接到负母线并且可连接到电源的负极端子。 DC总线具有一个或多个正极连接，可从正极母线固定到电源模块的高侧。 DC总线还具有一个或多个从负母线固定到电源模块的低端的负极连接。 正母线和负母线允许电流逆流，从而消除磁场及其相关的电感，正负母线可连接到电源模块的中心部分。

    Continuously Referencing Signals Over Multiple Layers in Laminate Packages
    27.
    发明申请
    Continuously Referencing Signals Over Multiple Layers in Laminate Packages 有权
    连续引用层叠软件包中多层信号

    公开(公告)号：US20090256253A1

    公开(公告)日：2009-10-15

    申请号：US12490872

    申请日：2009-06-24

    Applicant: Francesco Preda ,  Lloyd A. Walls

    Inventor： Francesco Preda ,  Lloyd A. Walls

    IPC: H01L23/12 ,  H01L21/50 ,  G06F17/50

    CPC classification number: H01L23/50 ,  H01L23/5383 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/10522 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/0401

    Abstract: A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package.

    Abstract translation: 用于在层压封装中连续地参考多层信号的机构提供了用于从一层到另一层的信号的连续路径，同时使用用于封装的所有区域的理想电压基准并且仍避免电压基准中的不连续性。 参考平面调整引擎分析封装设计，并为封装的所有区域（包括特定芯片裸片下的区域）和不在芯片裸片下的区域识别理想的顶层平面。 参考平面调整引擎然后修改封装设计以重新定位层之间的接地层，源电压平面，信号面和通孔，以保持连续的电压基准，而不管顶层如何。 参考平面调整引擎将所得到的混合电压平面封装设计提供给设计分析引擎。 包装制造系统制造包装。

    LEADFRAME-BASED MODULE DC BUS DESIGN TO REDUCE MODULE INDUCTANCE
    29.
    发明申请
    LEADFRAME-BASED MODULE DC BUS DESIGN TO REDUCE MODULE INDUCTANCE 失效
    基于LEADFRAME的模块直流总线设计，以减少模块电感

    公开(公告)号：US20070193763A1

    公开(公告)日：2007-08-23

    申请号：US11673279

    申请日：2007-02-09

    Applicant: Scott Parkhill ,  Sayeed Ahmed ,  Fred Flett

    Inventor： Scott Parkhill ,  Sayeed Ahmed ,  Fred Flett

    IPC: H05K9/00

    CPC classification number: H01L25/072 ,  H01L2223/665 ,  H01L2924/0002 ,  H02M7/003 ,  H05K1/0215 ,  H05K1/0237 ,  H05K1/0306 ,  H05K7/1432 ,  H05K2201/09345 ,  H05K2201/10446 ,  H05K2201/10636 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49002 ,  Y10T29/49009 ,  Y10T29/49117 ,  Y10T29/49126 ,  H01L2924/00

    Abstract: A DC bus for use in a power module has a positive DC conductor bus plate parallel with a negative DC conductor bus plate. One or more positive leads are connected to the positive bus and are connectable to a positive terminal of a power source. One or more negative leads are connected to the negative bus and are connectable to a negative terminal of a power source. The DC bus has one or more positive connections fastenable from the positive bus to the high side of a power module. The DC bus also has one or more negative connections fastenable from the negative bus to the low side of the power module. The positive bus and negative bus permit counter-flow of currents, thereby canceling magnetic fields and their associated inductances, and the positive and negative bus are connectable to the center portion of a power module.

    Abstract translation: 用于电源模块的直流母线具有与负直流导体总线板平行的正直流导体母线板。 一个或多个正极引线连接到正极母线，并且可连接到电源的正极端子。 一个或多个负极引线连接到负母线并且可连接到电源的负极端子。 DC总线具有一个或多个正极连接，可从正极母线固定到电源模块的高侧。 DC总线还具有一个或多个从负母线固定到电源模块的低端的负极连接。 正母线和负母线允许电流逆流，从而消除磁场及其相关的电感，正负母线可连接到电源模块的中心部分。

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