公开(公告)号：US20170196123A1

公开(公告)日：2017-07-06

申请号：US14985765

申请日：2015-12-31

Applicant: Infinera Corp.

Inventor： Matthew James Kelty

IPC: H05K7/20 ,  H05K7/18 ,  H05K5/02

CPC classification number: H04Q1/035

Abstract: An apparatus, comprising a linecard including a circuit board having a front side connectable to a pluggable optical module and a back side opposite the front side; a heat relay apparatus comprising a heat pipe on the circuit board; a pluggable optical module generating a first amount of heat and being in thermal contact with the heat pipe; and a cooling module including a heat sink in thermal contact with the heat pipe, the cooling module generating a second amount of heat in a range from the first amount of heat to no heat; and wherein heat from the pluggable optical module is transferable through the heat pipe to the cooling module for dispersal from the heat sink.

公开(公告)号：US20160178846A1

公开(公告)日：2016-06-23

申请号：US14577502

申请日：2014-12-19

Applicant: Infinera Corp.

Inventor： Joseph Summers ,  Peter Evans ,  Pavel Studenkov ,  Mark Missey ,  Mehrdad Ziari

IPC: G02B6/293

CPC classification number: G02B6/29344 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/14 ,  G02B6/28 ,  G02B6/2804 ,  G02B6/2813 ,  G02B6/29379 ,  G02B6/2938

Abstract: An apparatus having a first waveguide, a second waveguide, a third waveguide, a fourth waveguide, and a fifth waveguide is described. A symmetric coupler has a proximal end and a distal end. The proximal end of the symmetric coupler is coupled to and in optical communication with the first waveguide and the second waveguide. The distal end of the symmetric coupler is coupled to and in optical communication with the fourth waveguide. An asymmetric coupler has a proximal end and a distal end. The asymmetric coupler is in a cascaded configuration with the symmetric coupler. The cascaded configuration has the proximal end of the asymmetric coupler coupled to and in optical communication with the fourth waveguide and the third waveguide. The distal end of the asymmetric coupler is coupled to and in optical communication with the fifth waveguide.

Abstract translation: 描述了具有第一波导，第二波导，第三波导，第四波导和第五波导的装置。 对称耦合器具有近端和远端。 对称耦合器的近端耦合到第一波导和第二波导并且与第一波导和第二波导光连通。 对称耦合器的远端耦合到第四波导并与第四波导光耦合。 不对称耦合器具有近端和远端。 不对称耦合器处于具有对称耦合器的级联配置。 级联构造具有耦合到第四波导和第三波导并且与第四波导和第三波导光学连通的不对称耦合器的近端。 非对称耦合器的远端耦合到第五波导并与第五波导光耦合。

公开(公告)号：US09258215B2

公开(公告)日：2016-02-09

申请号：US14144843

申请日：2013-12-31

Applicant: Infinera Corp.

Inventor： Iftekhar Hussain ,  Rajan Rao ,  Ping Pan ,  Paul N. Freeman ,  Radhakrishna Valiveti

IPC: H04B10/00 ,  H04L12/707 ,  H04Q11/00 ,  H04L1/00 ,  H04B10/032

CPC classification number: H04L45/22 ,  H04B10/032 ,  H04J14/0291 ,  H04L1/0041 ,  H04L1/0042 ,  H04L1/007 ,  H04L1/0072 ,  H04L12/6418 ,  H04Q11/0003 ,  H04Q11/0066 ,  H04Q2011/0081

Abstract: Systems and methods are disclosed for modulating, with circuitry of a source node in a communication network, at least one optical carrier to carry data utilizing a format of a soft decision forward error correction (SD-FEC) data field of an overhead portion of a data frame; encoding, with the circuitry of the source node, first data being SD-FEC data and second data being additional data into the SD-FEC data field, the first and second data being accessible without accessing client data traffic; and transmitting, with the circuitry of the source node, the data frame including the soft decision forward error correction data field. In one implementation, the second data comprises automatic protection switching bytes.

Abstract translation: 公开的系统和方法用于通过通信网络中的源节点的电路来调制至少一个光载波，以便利用一个的开销部分的软判决前向纠错（SD-FEC）数据字段的格式来传送数据 数据框; 编码与源节点的电路，第一数据是SD-FEC数据，第二数据是作为SD-FEC数据字段中的附加数据，第一和第二数据可访问而不访问客户端数据业务; 并且与源节点的电路一起发送包括软判决前向纠错数据字段的数据帧。 在一个实现中，第二数据包括自动保护切换字节。

公开(公告)号：US20150333860A1

公开(公告)日：2015-11-19

申请号：US14141819

申请日：2013-12-27

Applicant: Infinera Corp.

Inventor： Jeffrey T. RAHN

IPC: H04J14/02 ,  H04L27/00 ,  H04B10/572 ,  H04B10/564

CPC classification number: H04B10/516 ,  H04B10/572 ,  H04J14/0221 ,  H04L27/0008 ,  H04L27/34

Abstract: A device receives a modulation format and a baud rate for transmission of an optical signal, and generates optical signals based on the modulation format and the baud rate. The device generates quadrature-delay-interferometer signals based on the optical signal, the modulation format, and the baud rate, and generates a particular optical signal with a particular wavelength for the modulation format and the baud rate. The device determines whether a point of the quadrature-delay-interferometer signals is associated with the particular wavelength of the particular optical signal, and sets or adjusts the particular wavelength of the particular optical signal for the modulation format and the baud rate based on whether a point of the quadrature-delay-interferometer signals is associated with the particular wavelength of the particular optical signal.

Abstract translation: 设备接收用于传输光信号的调制格式和波特率，并根据调制格式和波特率生成光信号。 该器件基于光信号，调制格式和波特率产生正交延迟干涉仪信号，并为调制格式和波特率生成具有特定波长的特定光信号。 该装置确定正交延迟干涉仪信号的点是否与特定光信号的特定波长相关联，并且基于是否将调制格式和波特率设置或调整特定光信号的特定波长 正交延迟干涉仪信号的点与特定光信号的特定波长相关联。

公开(公告)号：US09137590B2

公开(公告)日：2015-09-15

申请号：US13676946

申请日：2012-11-14

Applicant: Infinera Corp.

Inventor： Abinder Dhillon ,  Iftekhar Hussain ,  Rajan Rao ,  Marco Sosa

IPC: H04Q11/00 ,  H04J14/02 ,  H04L12/751 ,  H04L12/723 ,  H04L12/721

CPC classification number: H04Q11/0062 ,  H04J14/0267 ,  H04L45/02 ,  H04L45/50 ,  H04L45/62 ,  H04Q11/0003 ,  H04Q11/0005 ,  H04Q2011/0016 ,  H04Q2011/0073 ,  H04Q2011/0075 ,  H04Q2011/0077 ,  H04Q2011/0086 ,  H04Q2011/0088

Abstract: A method and system are disclosed in which a link state advertisement message (LSA) conforming to a Generalized Multiprotocol Label Switching (GMPLS) routing protocol is generated and transmitted. The LSA is associated with a TE Link between a transmit node and a receive node in a network. The transmit node supplies a plurality of optical signals, each of which has a plurality of frequencies, the frequencies being allocated among a plurality of spectral portions such that the plurality of spectral portions are grouped into a plurality of frequency slots. The LSA may include information indicative of a number of spectral portions, e.g., spectral slices, which correspond to frequencies of selected ones of the plurality of optical signals, said selected ones of the plurality of optical signals being available to carry data from the transmit node to the receive node.

Abstract translation: 公开了一种方法和系统，其中生成并发送符合广义多协议标签交换（GMPLS）路由协议的链路状态通告消息（LSA）。 LSA与网络中的发送节点和接收节点之间的TE链路相关联。 发送节点提供多个光信号，每个光信号具有多个频率，频率在多个频谱部分之间分配，使得多个频谱部分被分组成多个频率时隙。 LSA可以包括指示频谱部分的数量的信息，例如，对应于多个光信号中所选择的光信号的频率的频谱片段，所述多个光信号中的所选择的光信号可用于承载来自发射节点的数据 到接收节点。

公开(公告)号：US20150188641A1

公开(公告)日：2015-07-02

申请号：US14145296

申请日：2013-12-31

Applicant: Infinera Corp.

Inventor： Ahmed AWADALLA ,  Han Sun ,  Kuang-Tsan Wu

IPC: H04B10/61 ,  H04L27/38

CPC classification number: H04B10/61 ,  H04B10/611 ,  H04B10/612 ,  H04L1/0054 ,  H04L25/067 ,  H04L27/3818

Abstract: A digital signal processor (DSP), may identify symbol values associated with a 5 quadrature amplitude modulation (5QAM) signal. The DSP may determine a first bit set based on the symbol values and a first particular bit value. The DSP may determine a second bit set based on the symbol values and a second particular bit value. The DSP may compute a first distance based on the first bit set and the symbol values. The DSP may compute a second distance based on the second bit set and the symbol values. The DSP may determine that the first distance is less than the second distance. The first distance being less than the second distance may indicate that the first bit set is a correctly decoded bit set. The DSP may provide an output associated with the correctly decoded bit set.

Abstract translation: 数字信号处理器（DSP）可以识别与5正交幅度调制（5QAM）信号相关联的符号值。 DSP可以基于符号值和第一特定比特值来确定第一比特集合。 DSP可以基于符号值和第二特定比特值来确定第二比特集合。 DSP可以基于第一位集合和符号值计算第一距离。 DSP可以基于第二位集合和符号值计算第二距离。 DSP可以确定第一距离小于第二距离。 小于第二距离的第一距离可以指示第一位组是正确解码的位集合。 DSP可以提供与正确解码的位集相关联的输出。

公开(公告)号：US20150180580A1

公开(公告)日：2015-06-25

申请号：US13855552

申请日：2013-04-02

Applicant: INFINERA CORP.

Inventor： David Gerald Coult ,  Radhakrishnan L. Nagarajan ,  Jiaming Zhang ,  Joseph Edward Riska ,  Donald J. Pavinski ,  Jie Tang ,  Timothy Butrie

IPC: H04B10/50 ,  H04B10/516

CPC classification number: G02F1/0327 ,  G02B6/4274

Abstract: A photonic transmitter, comprises a modulator driver having a first and second output ports, a photonic integrated transmitter circuit having a modulator having a first and a second input line, and a first input port electrically coupled with the first input line and a second input port electrically coupled with the second input line, and an interconnect bridge assembly, including a first termination resistor, a second termination resistor, and a substrate. An impedance-controlled transmission structure is formed in the substrate, and has: (a) an impedance control section including a first and a second signal lines electrically insulated from one another; and (b) a transmission section including a third and a fourth signal line coupled with termination resistor. The interconnect bridge assembly transmits an impedance controlled differential electrical signal from the modulator driver to the modulator, and transmits the electrical signal from the modulator to the first and second termination resistors.

Abstract translation: 一种光子发射器，包括具有第一和第二输出端口的调制器驱动器，具有调制器的光子集成发射器电路，具有第一和第二输入线，以及与第一输入线电耦合的第一输入端口和第二输入端口 与第二输入线电耦合，以及互连桥组件，包括第一终端电阻器，第二终端电阻器和衬底。 阻抗控制传输结构形成在衬底中，并具有：（a）阻抗控制部分，包括彼此电绝缘的第一和第二信号线; 和（b）包括与终端电阻耦合的第三和第四信号线的发送部分。 互连桥组件将阻抗控制的差分电信号从调制器驱动器发送到调制器，并将电信号从调制器发送到第一和第二终端电阻器。

公开(公告)号：US20150131989A1

公开(公告)日：2015-05-14

申请号：US14145756

申请日：2013-12-31

Applicant: Infinera Corp.

Inventor： Sharfuddin Syed ,  Ping Pan ,  Abhinava Shivakumar Sadasivarao ,  Chris Liou

IPC: H04Q11/00 ,  H04L12/24

CPC classification number: H04Q11/0066 ,  H04L41/0803 ,  H04Q2011/0016 ,  H04Q2011/0073 ,  H04Q2011/0077 ,  H04Q2011/0086

Abstract: Apparatuses are disclosed including a node having a switch for communicating traffic from input interface to output interface; and a control module, located proximate to the input interface, output interface and switch, comprising a communication interface configured to connect to a third communication link external to the node and having a processor accessing network node configuration information and being configured to compute a path to a destination node through the output interface with the network node configuration information and also configured to be switched from a first state in which the processor provides first instructions to the switch to configure the switch to communicate the traffic from the input interface to the output interface, to a second state in which the processor provides second instructions, received via the communication interface, to the switch to configure the switch to communicate traffic from the input interface to the output interface.

Abstract translation: 公开了一种装置，包括具有用于将流量从输入接口传送到输出接口的交换机的节点; 以及位于所述输入接口，输出接口和交换机附近的控制模块，包括被配置为连接到所述节点外部的第三通信链路并且具有处理器访问网络节点配置信息并被配置为计算到 目的地节点通过输出接口与网络节点配置信息相结合，并且还被配置为从处理器向交换机提供第一指令的第一状态切换以配置交换机以将来自输入接口的通信量传送到输出接口， 到处理器提供经由通信接口接收的第二指令到交换机以配置交换机以将通信量从输入接口传送到输出接口的第二状态。

公开(公告)号：US20150095466A1

公开(公告)日：2015-04-02

申请号：US14040912

申请日：2013-09-30

Applicant: Infinera Corp.

Inventor： Khuzema Pithewan ,  Muhammad Yaaseen ,  Rajkumar Pennadam Ramamoorthy ,  Mohit Misra

IPC: H04L12/24 ,  H04L12/947

CPC classification number: H04L41/0803 ,  H04L41/0668 ,  H04L41/12 ,  H04L49/25

Abstract: Systems and methods for accessing network configuration data identifying one or more working path(s) configured to transport data between source and destination nodes, wherein multiple working paths are prioritized, and including at least one first diversity weight of a first value indicative of at least one communication link in the working path(s), and at least one second diversity weight of a second value indicative of at least one communication link outside of the working path(s); calculating a disjoint protection path with the network configuration data, the first diversity weight, and the second diversity weight; the disjoint protection path including at least the source node and the destination node and at least one communication link that is mutually exclusive from the at least one communication link of the first set; and outputting at least one setup signal to configure the disjoint protection path within the mesh network.

Abstract translation: 用于访问网络配置数据的系统和方法，用于识别被配置为在源节点和目的地节点之间传输数据的一个或多个工作路径，其中多个工作路径被优先化，并且包括至少指示至少一个的第一值的第一分集权重 工作路径中的一个通信链路和指示工作路径之外的至少一个通信链路的第二值的至少一个第二分集权重; 利用网络配置数据，第一分集权重和第二分集权重计算不相交保护路径; 所述不相交保护路径至少包括所述源节点和所述目的地节点以及与所述第一组的所述至少一个通信链路相互排斥的至少一个通信链路; 并输出至少一个设置信号以配置网状网络内的不相交保护路径。

公开(公告)号：US20140369698A1

公开(公告)日：2014-12-18

申请号：US14471832

申请日：2014-08-28

Applicant: Infinera Corp.

Inventor： Kuang-Tsan Wu ,  John D. McNicol ,  David F. Welch ,  Stephen G. Grubb ,  Pierre Mertz

IPC: H04B10/516 ,  H04B10/2575

CPC classification number: H04B10/516 ,  H04B10/2575

Abstract: An apparatus including a photodiode, a low pass filter, an analog-to-digital converter, an interpolation circuit and a digital signal processor is disclosed. The photodiode receives a portion of a plurality of optical signals, each of which is modulated in accordance with a corresponding one of a plurality of data streams, and each having a corresponding one of a plurality of wavelengths. The photodiode supplies an electrical output. The low-pass filter supplies a filtered output in response to the electrical output. The analog-to-digital converter is configured to sample the filtered output at a first sampling rate to generate a plurality of first data samples. The interpolation circuit is configured to receive the plurality of first data samples and supply a plurality of second data samples at a second sampling rate less the first sampling rate. The digital signal processor circuit is configured to receive the plurality of second data samples.

Abstract translation: 公开了一种包括光电二极管，低通滤波器，模数转换器，内插电路和数字信号处理器的装置。 光电二极管接收多个光信号的一部分，每个光信号根据多个数据流中的相应一个被调制，并且每个具有多个波长的对应一个。 光电二极管提供电气输出。 低通滤波器根据电气输出提供滤波输出。 模数转换器被配置为以第一采样率采样滤波后的输出以产生多个第一数据采样。 内插电路被配置为接收多个第一数据采样并且以小于第一采样率的第二采样率提供多个第二数据采样。 数字信号处理器电路被配置为接收多个第二数据采样。