公开(公告)号：US20250069916A1

公开(公告)日：2025-02-27

申请号：US18237377

申请日：2023-08-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo TIEN ,  Chih-Cheng LEE

IPC: H01L21/67 ,  B32B43/00

Abstract: A method and equipment for manufacturing a package structure are disclosed. The equipment includes a first space, a de-bonding apparatus, a second space and a fluid supply device. The de-bonding apparatus is disposed in the first space, and configured to perform a de-bonding process. The second space is disposed around the first space. The fluid supply device is configured to make a first humidity of an atmosphere in the first space greater than a second humidity of an atmosphere in the second space.

公开(公告)号：US20240120288A1

公开(公告)日：2024-04-11

申请号：US17962354

申请日：2022-10-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Hsin LAI ,  Chih-Cheng LEE ,  Shao-Lun YANG ,  Wei-Chih CHO

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/3025

Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate, an encapsulant and an electronic component. The encapsulant is disposed over the substrate, and has a first top surface, a second top surface and a first lateral surface extending between the first top surface and the second top surface. A roughness of the first lateral surface is less than or equal to a roughness of the second top surface. The electronic component is disposed over the second top surface of the encapsulant and electrically connected to the substrate.

公开(公告)号：US20230033515A1

公开(公告)日：2023-02-02

申请号：US17963067

申请日：2022-10-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo TIEN ,  Chih-Cheng LEE

IPC: H01L23/00 ,  H01L25/16 ,  H01L21/48 ,  H01L23/538

Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, and a first circuit layer disposed on the substrate. The first circuit layer includes a conductive wiring pattern, and the conductive wiring pattern is an uppermost conductive pattern of the first circuit layer. The stress buffering structure is disposed on the first conductive structure. The second conductive structure is disposed over the stress buffering structure. The conductive wiring pattern extends through the stress buffering structure and electrically connected to the second conductive structure, and an upper surface of the conductive wiring pattern is substantially coplanar with an upper surface of the stress buffering structure.

公开(公告)号：US20230009219A1

公开(公告)日：2023-01-12

申请号：US17372339

申请日：2021-07-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo TIEN ,  Chih-Cheng LEE

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/16 ,  H01L23/48

Abstract: A semiconductor device, a semiconductor device package, and a method of manufacturing a semiconductor device package are provided. The semiconductor device includes an electronic component and a first protection layer. The electronic component includes a first conductive pad protruded out of a first surface of the electronic component. The first protection layer covers an external surface of the first conductive pad. The first surface of the electronic component is exposed from the first protection layer.

公开(公告)号：US20220359361A1

公开(公告)日：2022-11-10

申请号：US17873085

申请日：2022-07-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Che LEE ,  Ming-Chiang LEE ,  Yuan-Chang SU ,  Tien-Szu CHEN ,  Chih-Cheng LEE ,  You-Lung YEN

IPC: H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H01L21/48

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

公开(公告)号：US20220157745A1

公开(公告)日：2022-05-19

申请号：US17589720

申请日：2022-01-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wu Chou HSU ,  Chih-Cheng LEE ,  Min-Yao CHEN ,  Hsing Kuo TIEN

IPC: H01L23/64 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.

公开(公告)号：US20210391283A1

公开(公告)日：2021-12-16

申请号：US16899507

申请日：2020-06-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wu Chou HSU ,  Chih-Cheng LEE ,  Min-Yao CHEN ,  Hsing Kuo TIEN

IPC: H01L23/64 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.

公开(公告)号：US20210280565A1

公开(公告)日：2021-09-09

申请号：US17330240

申请日：2021-05-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Mei HUANG ,  Shih-Yu WANG ,  I-Ting LIN ,  Wen Hung HUANG ,  Yuh-Shan SU ,  Chih-Cheng LEE ,  Hsing Kuo TIEN

IPC: H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01L23/522 ,  H01L21/56 ,  H01L23/528

Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.

公开(公告)号：US20200279788A1

公开(公告)日：2020-09-03

申请号：US16878475

申请日：2020-05-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Lin HO ,  Chih-Cheng LEE

IPC: H01L23/367 ,  H01L21/768 ,  H01L23/00 ,  H01L23/373

Abstract: The present disclosure provides a semiconductor substrate, including a first patterned conductive layer, a dielectric structure on the first patterned conductive layer, wherein the dielectric structure having a side surface, a second patterned conductive layer on the dielectric structure and extending on the side surface, and a third patterned conductive layer on the second patterned conductive layer and extending on the side surface. The present disclosure provides a semiconductor package including the semiconductor substrate. A method for manufacturing the semiconductor substrate and the semiconductor package is also provided.

公开(公告)号：US20190080995A1

公开(公告)日：2019-03-14

申请号：US15699816

申请日：2017-09-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Cheng LEE ,  Yuan-Chang SU

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/683

Abstract: A substrate for packaging a semiconductor device includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, and a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer. The first patterned conductive layer includes a first portion and a second portion. Each of the first portion and the second portion is embedded in the first dielectric layer and protrudes relative to the first surface of the first dielectric layer toward a direction away from the second surface of the first dielectric layer. A thickness of the first portion of the first patterned conductive layer is greater than a thickness of the second portion of the first patterned conductive layer.