公开(公告)号：US20140154889A1

公开(公告)日：2014-06-05

申请号：US13840206

申请日：2013-03-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Xikun Wang ,  Ching-Mei Hsu ,  Nitin K. Ingle ,  Zihui Li ,  Anchuan Wang

IPC: H01L21/3065

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01L21/02049 ,  H01L21/32136

Abstract: Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasma effluents react with exposed surfaces and selectively remove tungsten while very slowly removing other exposed materials. Sequential and simultaneous methods are included to remove thin tungsten oxide which may, for example, result from exposure to the atmosphere.

Abstract translation: 描述了相对于含硅膜（例如氧化硅，氮化碳和（多）硅）选择性地蚀刻钨的方法以及氧化钨。 这些方法包括由含氟前体和/或氢（H 2）形成的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与钨反应。 等离子体流出物与暴露的表面反应并选择性地去除钨，同时非常缓慢地除去其它暴露的材料。 包括顺序和同时的方法以除去例如由于暴露于大气中而产生的薄氧化钨。

公开(公告)号：US20140080308A1

公开(公告)日：2014-03-20

申请号：US13834611

申请日：2013-03-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Zhijun Chen ,  Jingchun Zhang ,  Ching-Mei Hsu ,  Seung Park ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L21/311

CPC classification number: H01L21/31116 ,  H01J37/32357

Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a nitrogen-and-hydrogen-containing precursor. Reactants thereby produced etch the patterned heterogeneous structures with high silicon oxide selectivity while the substrate is at high temperature compared to typical Siconi™ processes. The etch proceeds without producing residue on the substrate surface. The methods may be used to remove silicon oxide while removing little or no silicon, polysilicon, silicon nitride or titanium nitride.

Abstract translation: 描述了在图案化异质结构上蚀刻暴露的氧化硅的方法，并且包括由含氟前体形成的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入衬底处理区域，其中等离子体流出物与含氮和氢的前体结合。 因此，与典型的Siconi TM工艺相比，反应物在衬底处于高温下时蚀刻具有高氧化硅选择性的图案化异质结构。 蚀刻进行而不会在基板表面上产生残留物。 该方法可以用于去除硅或氧化硅，同时除去硅或多晶硅，氮化硅或氮化钛。

公开(公告)号：US20130298942A1

公开(公告)日：2013-11-14

申请号：US13791372

申请日：2013-03-08

Applicant: APPLIED MATERIALS, INC.

Inventor： He Ren ,  Nitin K. Ingle ,  Anchuan Wang

IPC: H01L21/02

CPC classification number: H01L21/0206 ,  H01J37/32357 ,  H01L21/76814

Abstract: Methods of removing residual polymer from vertical walls of a patterned dielectric layer are described. The methods involve the use of a gas phase etch to remove the residual polymer without substantially disturbing the patterned dielectric layer. The gas phase etch may be used on a patterned low-k dielectric layer and may maintain the low dielectric constant of the patterned dielectric layer. The gas phase etch may further avoid stressing the patterned low-k dielectric layer by avoiding the use of liquid etchants whose surface tension can upset delicate low-K features. The gas phase etch may further avoid the formation of solid etch by-products which cars also deform the delicate features.

Abstract translation: 描述了从图案化介电层的垂直壁去除残余聚合物的方法。 该方法涉及使用气相蚀刻来除去残留的聚合物，而基本上不干扰图案化的介电层。 气相蚀刻可以用在图案化的低k电介质层上，并且可以保持图案化介电层的低介电常数。 气相蚀刻可以进一步避免使用液面蚀刻剂来表现图案化的低k电介质层，其表面张力可能使精细的低K特征受损。 气相蚀刻可以进一步避免固体蚀刻副产物的形成，这些汽车也使精细特征变形。

公开(公告)号：US20240332027A1

公开(公告)日：2024-10-03

申请号：US18128036

申请日：2023-03-29

Applicant: Applied Materials, Inc.

Inventor： Anchuan Wang ,  Jiayin Huang ,  Kalpana Suen

IPC: H01L21/3065

CPC classification number: H01L21/3065

Abstract: Exemplary methods of semiconductor processing may include providing a first fluorine-containing precursor to a remote plasma system of a semiconductor processing chamber. The methods may include generating plasma effluents of the first fluorine-containing precursor in the remote plasma system. The methods may include providing plasma effluents of the first fluorine-containing precursor to a processing region of the semiconductor processing chamber. The methods may include providing a second fluorine-containing precursor to the processing region of the semiconductor processing chamber. A substrate including alternating layers of material may be disposed within the processing region. The alternating layers of material may include a silicon-and-germanium-containing material. The methods may include contacting the substrate with the plasma effluents of the first fluorine-containing precursor and with the second fluorine-containing precursor. The methods may include etching the silicon-and-germanium-containing material of the alternating layers of material on the substrate.

公开(公告)号：US11769671B2

公开(公告)日：2023-09-26

申请号：US17018206

申请日：2020-09-11

Applicant: Applied Materials, Inc.

Inventor： Zhenjiang Cui ,  Anchuan Wang

IPC: H01L21/3065 ,  C23F1/12

CPC classification number: H01L21/3065 ,  C23F1/12

Abstract: Exemplary etching methods may include flowing a fluorine-containing precursor and a hydrogen-containing precursor into a remote plasma region of a semiconductor processing chamber. The hydrogen-containing precursor may be flowed at a flow rate of at least 2:1 relative to the flow rate of the fluorine-containing precursor. The methods may include forming a plasma of the fluorine-containing precursor and the hydrogen-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents into a substrate processing region housing a substrate. The substrate may include an exposed region of a tantalum or titanium material and an exposed region of a silicon-containing material or a metal. The methods may include contacting the substrate with the plasma effluents. The methods may include removing the tantalum or titanium material selectively to the silicon-containing material or the metal.

公开(公告)号：US20230290647A1

公开(公告)日：2023-09-14

申请号：US17689092

申请日：2022-03-08

Applicant: Applied Materials, Inc.

Inventor： Baiwei Wang ,  Rohan Puligoru Reddy ,  Xiaolin C. Chen ,  Zhenjiang Cui ,  Anchuan Wang

IPC: H01L21/3213 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11556

CPC classification number: H01L21/32136 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11556

Abstract: Exemplary methods of etching may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or include oxygen or nitrogen. A flow rate ratio of the fluorine-containing precursor to the secondary gas may be greater than or about 1:1. The methods may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The substrate may include an exposed metal. The substrate may define a high aspect-ratio structure. The methods may include etching the exposed metal within the high aspect-ratio structure.

公开(公告)号：US20230102558A1

公开(公告)日：2023-03-30

申请号：US17487596

申请日：2021-09-28

Applicant: Applied Materials, Inc.

Inventor： Arvind Kumar ,  Mahendra Pakala ,  Ellie Y. Yieh ,  John Tolle ,  Thomas Kirschenheiter ,  Anchuan Wang ,  Zihui Li

IPC: H01L27/108 ,  H01L29/06 ,  H01L29/786 ,  H01L21/02 ,  H01L21/306 ,  H01L29/66

Abstract: Methods of reducing wafer bowing in 3D DRAM devices are described using a 3-color process. A plurality of film stacks are formed on a substrate surface, each of the film stacks comprises two doped SiGe layers having different dopant amounts and/or Si:Ge ratios and a doped silicon layer. 3D DRAM devices are also described.

公开(公告)号：US20230010978A1

公开(公告)日：2023-01-12

申请号：US17373161

申请日：2021-07-12

Applicant: Applied Materials, Inc.

Inventor： Baiwei Wang ,  Xiaolin C. Chen ,  Rohan Puligoru Reddy ,  Oliver Jan ,  Zhenjiang Cui ,  Anchuan Wang

IPC: H01L21/3213 ,  H01J37/32

Abstract: Exemplary etching methods may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the processing region with the oxygen-containing precursor. The substrate may include an exposed region of a transition metal nitride and an exposed region of a metal. The contacting may form an oxidized portion of the transition metal nitride and an oxidized portion of the metal. The methods may include forming a plasma of a fluorine-containing precursor and a hydrogen-containing precursor to produce fluorine-containing plasma effluents. The methods may include removing the oxidized portion of the transition metal nitride to expose a non-oxidized portion of the transition metal nitride. The methods may include forming a plasma of a chlorine-containing precursor to produce chlorine-containing plasma effluents. The methods may include removing the non-oxidized portion of the transition metal nitride.

公开(公告)号：US11211286B2

公开(公告)日：2021-12-28

申请号：US16277104

申请日：2019-02-15

Applicant: Applied Materials, Inc.

Inventor： Ashish Pal ,  Gaurav Thareja ,  Sankuei Lin ,  Ching-Mei Hsu ,  Nitin K. Ingle ,  Ajay Bhatnagar ,  Anchuan Wang

IPC: H01L21/764 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/78 ,  H01L27/092 ,  H01L29/417

Abstract: Processing methods may be performed to form an airgap spacer on a semiconductor substrate. The methods may include forming a spacer structure including a first material and a second material different from the first material. The methods may include forming a source/drain structure. The source/drain structure may be offset from the second material of the spacer structure by at least one other material. The methods may also include etching the second material from the spacer structure to form the airgap. The source/drain structure may be unexposed to etchant materials during the etching.

公开(公告)号：US20190326123A1

公开(公告)日：2019-10-24

申请号：US16435910

申请日：2019-06-10

Applicant: Applied Materials, Inc.

Inventor： Zihui Li ,  Rui Cheng ,  Anchuan Wang ,  Nitin K. Ingle ,  Abhijit Basu Mallick

IPC: H01L21/3065

Abstract: Exemplary methods for selectively removing silicon (e.g. polysilicon) from a patterned substrate may include flowing a fluorine-containing precursor into a substrate processing chamber to form plasma effluents. The plasma effluents may remove silicon (e.g. polysilicon, amorphous silicon or single crystal silicon) at significantly higher etch rates compared to exposed silicon oxide, silicon nitride or other dielectrics on the substrate. The methods rely on the temperature of the substrate in combination with some conductivity of the surface to catalyze the etch reaction rather than relying on a gas phase source of energy such as a plasma.