公开(公告)号：US11762592B2

公开(公告)日：2023-09-19

申请号：US17462982

申请日：2021-08-31

Applicant: Micron Technology, Inc.

Inventor： Wolfgang Anton Spirkl ,  Peter Mayer ,  Martin Brox ,  Michael Dieter Richter ,  Thomas Hein

IPC: G06F3/00 ,  G06F3/06 ,  G11C11/22

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679 ,  G11C11/221 ,  G11C11/2297 ,  G11C11/2255 ,  G11C11/2257 ,  G11C11/2273

Abstract: Methods, systems, and devices for receive-side crosstalk cancelation are described. A device that receives multiple signals over different transmission lines may include a circuit for canceling crosstalk. The circuit may include one or more capacitors or inductors that are coupled with the inputs of multiple receive circuits. The circuit may also include a set of resistors that are coupled with the receive circuits. In some cases, the device may dynamically configure the cancelation circuit to provide a particular bandwidth or strength of cancelation. In such cases, the device may configure the circuit autonomously or based on control information from another device.

公开(公告)号：US11709730B2

公开(公告)日：2023-07-25

申请号：US17493985

申请日：2021-10-05

Applicant: Micron Technology, Inc.

Inventor： Peter Mayer ,  Thomas Hein ,  Martin Brox ,  Wolfgang Anton Spirkl ,  Michael Dieter Richter

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/42

CPC classification number: G06F11/1044 ,  G06F11/1016 ,  G06F11/1028 ,  G11C29/42

Abstract: Systems, apparatuses, and methods for transmission failure feedback associated with a memory device are described. A memory device may detect errors in received data and transmit an indication of the error when detected. The memory device may receive data and checksum information for the data from a controller. The memory device may generate a checksum for the received data and may detect transmission errors. The memory device may transmit an indication of detected errors to the controller, and the indication may be transmitted using a line that is different than an error detection code (EDC) line. A low-speed tracking clock signal may also be transmitted by the memory device over a line different than the EDC line. The memory device may transmit a generated checksum to the controller with a time offset applied to the checksum signaled over the EDC line.

公开(公告)号：US11699993B2

公开(公告)日：2023-07-11

申请号：US17395069

申请日：2021-08-05

Applicant: Micron Technology, Inc.

Inventor： Martin Brox ,  Thomas Hein ,  Mani Balakrishnan

IPC: G11C17/16 ,  H03K5/24 ,  G11C17/18

CPC classification number: H03K5/249 ,  G11C17/16 ,  G11C17/18

Abstract: Methods, systems, and devices for signal sampling with offset calibration are described. For example, sampling circuitry may include an input pair of transistors where input signals may be provided to gate nodes of the transistors, and an output signal may be generated based on a comparison of voltages of drain nodes of the transistors. In some examples, source nodes of the transistors may be coupled with each other, such as via a resistance, and each source node may be configured to be coupled with a ground node. In some examples, a conductive path between the source nodes may be coupled with one or more switching components configurable for further coupling of the source nodes with the ground node. In some examples, enabling such switching components may add an electrical characteristic (e.g., capacitance) to the conductive path between the source nodes, which may be configurable to mitigate sampling circuitry imbalances.

公开(公告)号：US20230188248A1

公开(公告)日：2023-06-15

申请号：US18108065

申请日：2023-02-10

Applicant: Micron Technology, Inc.

Inventor： Stefan Dietrich ,  Thomas Hein ,  Natalija Jovanovic ,  Ronny Schneider ,  Michael Dieter Richter ,  Martin Brox

IPC: H04L1/00

CPC classification number: H04L1/0003

Abstract: Methods, systems, and devices for data inversion techniques are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some portions of some multi-symbol signals may be inverted. A transmitting device may determine to invert one or more data symbols based on one or more parameters. A receiving device may determine that one or more data symbols are inverted and may re-invert the one or more data symbols (e.g., to an original value). When receiving or transmitting a multi-symbol signal, a device may invert or re-invert a data symbol by changing a value of one bit of the data symbol. Additionally or alternatively, a device may invert or re-invert a data symbol of a multi-symbol signal by inverting a physical level of the signal across an axis located between or associated with one or more physical levels.

公开(公告)号：US11670578B2

公开(公告)日：2023-06-06

申请号：US17334447

申请日：2021-05-28

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

公开(公告)号：US11615862B2

公开(公告)日：2023-03-28

申请号：US17121314

申请日：2020-12-14

Applicant: Micron Technology, Inc.

Inventor： Markus Balb ,  Thomas Hein ,  Heinz Hoenigschmid

IPC: G11C29/44 ,  G11C29/12 ,  G11C29/38

Abstract: Methods, systems, and devices for link evaluation for a memory device are described. A memory device may receive signaling over a channel and may identify logic values encoded into the signaling based on sampling the signaling against a reference voltage. The sampling may occur at a reference time within a sampling period. To evaluate a quality (e.g., margin of error) of the channel, the memory device may adjust the reference voltage, the reference time, or both, and either the memory device or the host device may determine whether the memory device is still able to correctly identify logic values encoded into signaling over the channel. In some cases, the channel quality may be evaluated during a refresh cycle or at another opportunistic time for the memory device.

公开(公告)号：US11531632B2

公开(公告)日：2022-12-20

申请号：US17464021

申请日：2021-09-01

Applicant: Micron Technology, Inc.

Inventor： Martin Brox ,  Wolfgang Anton Spirkl ,  Thomas Hein ,  Michael Dieter Richter ,  Peter Mayer

IPC: G06F13/16 ,  G06F13/40 ,  G11C11/4093 ,  G11C11/22

Abstract: Methods, systems, and devices for multi-level receivers with various operating modes (e.g., on-die termination mode, termination-off mode, etc.) are described. Different modes may be utilized for receiving different types of signaling over a channel. Each mode may correspond to the use of a respective set of receivers configured for the different types of signaling. For example, a device may include a first set of receivers used to receive a first type of signal (e.g., with the channel being actively terminated) and a second set of receivers used to receive a second type of signal (e.g., with the channel being non-terminated). When communicating with another device, based on the type of signaling used for communications, either the first set of receivers or the second set of receivers may be enabled (e.g., through selecting a receiver path for the corresponding mode).

公开(公告)号：US20220391114A1

公开(公告)日：2022-12-08

申请号：US17890772

申请日：2022-08-18

Applicant: Micron Technology, Inc.

Inventor： Michael Dieter Richter ,  Wolfgang Anton Spirkl ,  Thomas Hein ,  Peter Mayer ,  Martin Brox

IPC: G06F3/06 ,  G06N3/04 ,  G06N3/08

Abstract: Methods, systems, and devices for memory operations that support configuring a channel, such as a command/address (C/A) channel, are described. A configuration of a C/A channel may be dynamically adapted based on power saving considerations, control information execution latency, or both. Configuring a C/A channel may include determining a quantity of pins, or a quantity of cycles, both for communicating control information over the C/A channel. The quantity of pins may be determined based on previous control information transmissions, characteristics of a memory device, or predicted control information transmissions, or any combination thereof in some cases. The determined quantity of pins, quantity of cycles, or both may be explicitly or implicitly indicated to other devices (e.g., that use the C/A channel).

公开(公告)号：US11500794B2

公开(公告)日：2022-11-15

申请号：US17241869

申请日：2021-04-27

Applicant: Micron Technology, Inc.

Inventor： Peter Mayer ,  Thomas Hein ,  Martin Brox ,  Wolfgang Anton Spirkl ,  Michael Dieter Richter

IPC: G06F11/00 ,  H03M13/00 ,  G06F13/16 ,  G06F11/10

Abstract: Systems, apparatuses, and methods for training procedures on reference voltages and sampling times associated with symbols communicated with a memory device are described. The training procedures may be configured to compensate for variations that may occur in different symbols of a signal. For example, an individual training operation may be performed for each reference voltage within a first unit interval. These individual training operations may allow a reference voltage of the first unit interval to be positionable independent of other reference voltages in the same unit interval or in different unit intervals. In another example, an individual training operation may be performed for the sampling time associated with a reference voltage. These individual training operations may allow a sampling time associated with a reference voltage in the first unit interval to be positionable independent of other sampling times in the same unit interval or in different unit intervals.

公开(公告)号：US11494258B2

公开(公告)日：2022-11-08

申请号：US17486751

申请日：2021-09-27

Applicant: Micron Technology, Inc.

Inventor： Michael Dieter Richter ,  Thomas Hein ,  Wolfgang Anton Spirkl ,  Martin Brox ,  Peter Mayer

IPC: G06F11/00 ,  G06F11/10 ,  G01K1/024

Abstract: Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).