公开(公告)号：US07932118B2

公开(公告)日：2011-04-26

申请号：US12336930

申请日：2008-12-17

Applicant: Philippe Robert ,  Valérie Nguyen

Inventor： Philippe Robert ,  Valérie Nguyen

IPC: H01L21/00

CPC classification number: B81C1/00484 ,  B81C1/00682 ,  B81C2201/053

Abstract: A mechanical component production method of a MEMS/NEMS structure from a monocrystalline silicon substrate includes forming anchoring zones in one face of the substrate. A lower protective layer, non-silicon, obtained by epitaxy from the face of the substrate is formed on the face. A silicon layer obtained by epitaxy from the lower protective layer is formed on the lower protective layer. An upper protective layer is formed on the silicon layer. The upper protective, silicon and lower protective layers are etched according to a pattern defining the component, until the substrate is reached, providing access routes to the substrate. A protective layer is formed on the walls formed by the etching in the epitaxied silicon layer. The component is released by isotropic etching of the substrate from the access routes, wherein the isotropic etching does not attack the lower and upper protective layers and the protective layer of the walls.

Abstract translation: 来自单晶硅衬底的MEMS / NEMS结构的机械部件制造方法包括在衬底的一个面中形成锚定区域。 通过从基板的表面外延获得的下保护层，非硅，形成在表面上。 在下保护层上形成由下保护层外延生成的硅层。 在硅层上形成上保护层。 根据限定组件的图案蚀刻上保护层，硅层和下保护层，直到到达衬底，提供到衬底的通路。 在由表层硅层中的蚀刻形成的壁上形成保护层。 通过从入口路径各向同性地蚀刻衬底来释放组件，其中各向同性蚀刻不会侵蚀壁的上下保护层和保护层。

公开(公告)号：US20110081740A1

公开(公告)日：2011-04-07

申请号：US12892190

申请日：2010-09-28

Applicant: SHANG-YING TSAI ,  CHUN-REN CHENG ,  JIOU-KANG LEE ,  JUNG-HUEI PENG ,  TING-HAU WU

Inventor： SHANG-YING TSAI ,  CHUN-REN CHENG ,  JIOU-KANG LEE ,  JUNG-HUEI PENG ,  TING-HAU WU

IPC: H01L21/02

CPC classification number: B41J2/16 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B81B2201/052 ,  B81C1/00666 ,  B81C2201/017 ,  B81C2201/053

Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.

Abstract translation: 用于形成包括MEMS器件结构的结构的系统和方法。 为了防止由牺牲材料（例如光致抗蚀剂）的固化过程引起的基板翘曲，以及随后的高温工艺步骤，改进的牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊的 功能组。 可以通过在衬底中形成沟槽并用牺牲材料填充沟槽来形成结构。 牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊功能组。 在完成进一步的工艺步骤之后，将牺牲材料从沟槽中移除。

公开(公告)号：US20100320555A1

公开(公告)日：2010-12-23

申请号：US12861778

申请日：2010-08-23

Applicant: Mark W. Miles ,  John Batey ,  Clarence Chui ,  Manish Kothari ,  Ming-Hau Tung

Inventor： Mark W. Miles ,  John Batey ,  Clarence Chui ,  Manish Kothari ,  Ming-Hau Tung

IPC: H01L31/0224 ,  H01L31/18

CPC classification number: B81B3/0086 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2201/053 ,  G02B26/001

Abstract: In one embodiment, the invention provides a method for fabricating a microelectromechanical systems device. The method comprises fabricating a first layer comprising a film having a characteristic electromechanical response, and a characteristic optical response, wherein the characteristic optical response is desirable and the characteristic electromechanical response is undesirable; and modifying the characteristic electromechanical response of the first layer by at least reducing charge build up thereon during activation of the microelectromechanical systems device.

Abstract translation: 在一个实施例中，本发明提供一种用于制造微机电系统装置的方法。 该方法包括制造包括具有特征机电响应的膜的第一层和特征光学响应，其中特征光学响应是期望的，并且特征机电响应是不期望的; 以及通过在所述微机电系统装置的启动期间至少减少其上的电荷积累来修改所述第一层的特征机电响应。

公开(公告)号：US20100283147A1

公开(公告)日：2010-11-11

申请号：US12677068

申请日：2008-07-24

Applicant: Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

Inventor： Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L21/78 ,  B81C1/00896 ,  B81C2201/053

Abstract: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis of the surface layer of a substrate. In this method, the surface layer is patterned and at least one cavity is produced below the surface layer, so that the individual chip regions are connected to each other and/or to the rest of the substrate by suspension webs only, and/or so that the individual chip regions are connected to the substrate layer below the cavity via supporting elements in the region of the cavity. The suspension webs and/or supporting elements are cut when the chips are separated. The patterned and undercut surface layer of the substrate is embedded in a plastic mass before the chips are separated.

Abstract translation: 一种芯片的制造方法，其中在晶片复合体中进行尽可能多的方法步骤，即对于设置在晶片上的多个芯片并行。 这是用于制造多个芯片的方法，其功能是基于基板的表面层来实现的。 在该方法中，对表面层进行图案化，并且在表面层下方产生至少一个空腔，使得单独的芯片区域仅通过悬挂网彼此连接和/或连接到基板的其余部分，和/或 单个芯片区域通过腔体区域中的支撑元件连接到腔体下方的衬底层。 当芯片分离时，悬挂网和/或支撑元件被切割。 在芯片分离之前，将衬底的图案和底切表面层嵌入塑料块中。

公开(公告)号：US07718457B2

公开(公告)日：2010-05-18

申请号：US11099118

申请日：2005-04-05

Applicant: Thomas Chen ,  Michael Judy

Inventor： Thomas Chen ,  Michael Judy

IPC: H01L21/00

CPC classification number: B81C1/00698 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2207/07 ,  B81C2201/0173 ,  B81C2201/053

Abstract: A method of producing a MEMS device provides an apparatus having structure on a first layer that is proximate to a substrate. The apparatus has a space proximate to the structure. The method adds doped material to the space. The doped material dopes at least a portion of the first layer.

Abstract translation: MEMS器件的制造方法提供了一种在靠近衬底的第一层上具有结构的设备。 该装置具有靠近结构的空间。 该方法向该空间添加掺杂材料。 掺杂材料涂覆第一层的至少一部分。

公开(公告)号：US20090170231A1

公开(公告)日：2009-07-02

申请号：US12336930

申请日：2008-12-17

Applicant: Philippe Robert ,  Valerie Nguyen

Inventor： Philippe Robert ,  Valerie Nguyen

IPC: H01L21/00 ,  H01L21/71 ,  H01L21/31 ,  B82B1/00

CPC classification number: B81C1/00484 ,  B81C1/00682 ,  B81C2201/053

Abstract: The invention concerns a method of producing at least one mechanical component of a MEMS or NEMS structure from a monocrystalline silicon substrate, comprising the steps of: forming anchoring zones in one face of the substrate to delimit the mechanical component, forming, on the face of the substrate, a lower protective layer made of material other than silicon and obtained by epitaxy from the face of the substrate, forming, on the lower protective layer, a silicon layer obtained by epitaxy from the lower protective layer, forming an upper protective layer on the silicon layer, etching the upper protective layer, the silicon layer and the lower protective layer, according to a pattern defining the mechanical component, until the substrate is reached and to provide access routes to the substrate, forming a protective layer on the walls formed by the etching of the pattern of the mechanical component in the epitaxied silicon layer, releasing the mechanical component by isotropic etching of the substrate from the access routes to the substrate, wherein said isotropic etching does not attack the lower and upper protective layers and the protective layer of the walls.

Abstract translation: 本发明涉及一种从单晶硅衬底生产MEMS或NEMS结构的至少一个机械部件的方法，包括以下步骤：在衬底的一个面中形成锚定区，以界定机械部件，在 基板，由硅以外的材料制成的下保护层，通过从基板的表面外延得到的下保护层，在下保护层上形成从下保护层外延生成的硅层，在上保护层上形成上保护层 硅层，根据限定机械部件的图案蚀刻上保护层，硅层和下保护层，直到到达基板并提供到基板的通路，在形成的壁上形成保护层 通过蚀刻表面硅层中的机械部件的图案，通过各向同性蚀刻来释放机械部件 从所述通路到所述基板的所述基板，其中所述各向同性蚀刻不会侵蚀所述下壁和上保护层以及所述壁的保护层。

公开(公告)号：US07459378B2

公开(公告)日：2008-12-02

申请号：US11269548

申请日：2005-11-09

Applicant: Satoshi Genda ,  Hiroshi Nakamura

Inventor： Satoshi Genda ,  Hiroshi Nakamura

IPC: H01L21/00

CPC classification number: B81C1/00888 ,  B81C2201/053 ,  H01L21/67132

Abstract: A method of dividing a wafer having a plurality of micro electro mechanical systems and a plurality of streets for partitioning the micro electro mechanical systems formed on the front surface of a wafer substrate, the method comprising a protective tape affixing step for affixing a protective tape to the front surface of the wafer; a cut groove-forming step for forming a cut groove by cutting the wafer having the protective tape affixed thereto along the streets from the back surface of the wafer substrate, leaving a cutting margin having a predetermined thickness on the front surface side of the wafer substrate; and a cutting step for cutting the cutting margins by applying a laser beam to the cutting margins of the cut grooves formed along the streets.

Abstract translation: 一种分割具有多个微电子机械系统的晶片的方法和用于分割形成在晶片基板的前表面上的微机电系统的多个街道的方法，所述方法包括用于将保护带固定的保护带固定步骤 晶片的前表面; 切割槽形成步骤，用于通过从晶片衬底的背面沿街道切割具有保护带的晶片来形成切割槽，在晶片衬底的前表面侧留下具有预定厚度的切割边缘 ; 以及切割步骤，通过将激光束施加到沿着街道形成的切割槽的切割边缘来切割切割边缘。

公开(公告)号：US07435663B2

公开(公告)日：2008-10-14

申请号：US11270491

申请日：2005-11-10

Applicant: Sheng-Hsiang Tseng ,  Fu-Yuan Xiao ,  Ying-Zong Juang ,  Chin-Fong Chiu

Inventor： Sheng-Hsiang Tseng ,  Fu-Yuan Xiao ,  Ying-Zong Juang ,  Chin-Fong Chiu

IPC: H01L21/00 ,  H01L21/44

CPC classification number: B81C1/00896 ,  B81C2201/053

Abstract: Simple but practical methods to dice a CMOS-MEMS multi-project wafer are proposed. On this wafer, micromachined microstructures have been fabricated and released. In a method, a photoresist is spun on the full wafer surface, and this photoresist is thick enough to cover all cavities and structures on the wafer, such that the photoresist will protect the released structures free from the chipping, vibrations, and damages in the diamond blade dicing process. In another method, a laser dicing system is utilized to scribe the multi-project wafer placed on a platform, and by precisely controlling the platform moving-track, the dicing path can be programmed to any required shape and region, even it is not straight. In addition, the wafer backside is mounted on a blue-tape at the beginning to enhance the process reliability.

Abstract translation: 提出了一种简单而实用的CMOS-MEMS多工程晶圆切割方法。 在该晶片上，微加工微结构已经被制造和释放。 在一种方法中，光致抗蚀剂在整个晶片表面上旋转，并且该光致抗蚀剂足够厚以覆盖晶片上的所有空腔和结构，使得光致抗蚀剂将保护释放的结构免于碎裂，振动和损坏 金刚石刀片切割工艺。 在另一种方法中，使用激光切割系统来划分放置在平台上的多工程晶片，并且通过精确地控制平台移动轨迹，切割路径可被编程为任何所需的形状和区域，即使不是直的 。 此外，晶片背面一开始就安装在蓝带上，以提高工艺的可靠性。

公开(公告)号：US07298022B2

公开(公告)日：2007-11-20

申请号：US11075881

申请日：2005-03-10

Applicant: Tetsuo Fujii ,  Tsuyoshi Fukada ,  Kenichi Ao

Inventor： Tetsuo Fujii ,  Tsuyoshi Fukada ,  Kenichi Ao

IPC: H01L23/544

CPC classification number: H01L21/6836 ,  B29C33/0022 ,  B29C2043/023 ,  B81C1/00888 ,  B81C1/00896 ,  B81C2201/053 ,  H01L2221/68327 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/16235 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is bonded to the protective sheet at an opposite side of the jig, and the jig is detached from the protective sheet and the semiconductor wafer bonded together. After that, the semiconductor wafer is cut into semiconductor chips by dicing along the grooves of the protective sheet. Because the protective sheet is not cut by dicing, no scraps of the protective sheet is produced, thereby preventing contamination to the chips.

Abstract translation: 将保护片固定在夹具上，除去对应于要进行切割的区域的保护片的区域，形成槽。 然后，在夹具的相反侧将半导体晶片接合到保护片，并将夹具与保护片和半导体晶片接合在一起。 之后，通过沿保护片的沟槽切割将半导体晶片切割成半导体芯片。 由于保护片不是通过切割而切割的，因此不会产生保护片的废料，从而防止对芯片的污染。

公开(公告)号：US07262900B2

公开(公告)日：2007-08-28

申请号：US11125473

申请日：2005-05-10

Applicant: Anthony DiCarlo ,  Rabah Mezenner ,  James C. Baker ,  Mark A. Franklin ,  George Harakas

Inventor： Anthony DiCarlo ,  Rabah Mezenner ,  James C. Baker ,  Mark A. Franklin ,  George Harakas

IPC: G02B26/00

CPC classification number: G02B26/0833 ,  B81B2201/042 ,  B81B2203/0181 ,  B81C1/00801 ,  B81C2201/053

Abstract: As robust hinge post structure for use with torsional hinged devices such as micromirrors and method of manufacturing is disclosed. The fabrication process uses a protective layer such as BARC on the bottom of the aperture used to form the hinge post structure to protect an oxide layer during an etching step. The oxide layer, in turn protects the metal layer at the bottom of the aperture. Therefore, the metal layer, the oxide layer, and the protective layer prevent the erosion and/or pitting of the bottom electrode during a cleaning process, and provide additional support to the structure.

Abstract translation: 公开了用于扭转铰接装置如微反射镜和制造方法的坚固的铰链柱结构。 制造工艺在用于形成铰链柱结构的孔的底部上使用诸如BARC的保护层，以在蚀刻步骤期间保护氧化物层。 氧化物层又保护孔的底部的金属层。 因此，金属层，氧化物层和保护层在清洁过程中防止底部电极的侵蚀和/或点蚀，并为结构提供额外的支撑。