High speed SAR ADC
    44.
    发明授权

    公开(公告)号:US12074611B2

    公开(公告)日:2024-08-27

    申请号:US17829998

    申请日:2022-06-01

    CPC classification number: H03M1/72 H03M1/124 H03M1/466

    Abstract: High speed, high dynamic range SAR ADC method and architecture. The SAR DAC comparison method can make fewer comparisons with less charge/fewer capacitors. The architecture makes use of a modified top plate switching (TPS) DAC technique and therefore achieves very high-speed operation. The present disclosure proffers a unique SAR ADC method of input and reference capacitor DAC switching. This benefits in higher dynamic range, no external decoupling capacitory requirement, wide common mode range and overall faster operation due to the absence of mini-ADC.

    COMMON MODE VOLTAGE CLAMP FOR MULTIDROP NETWORKS

    公开(公告)号:US20240154407A1

    公开(公告)日:2024-05-09

    申请号:US18052458

    申请日:2022-11-03

    CPC classification number: H02H9/046

    Abstract: An example common mode (CM) voltage clamp for a node of a multidrop network includes a first and second CM voltage dividers coupled to first and second lines of a differential link; a first N-type transistor coupled to the first line via a first diode, and further coupled to the first CM voltage divider; a second N-type transistor coupled to the second line via a second diode, and further coupled to the first CM voltage divider; a first P-type transistor coupled to a ground signal of the node via a third diode, and further coupled to the second CM voltage divider; and a second P-type transistor coupled to the ground signal of the node via a fourth diode and further coupled to the second CM voltage divider, where the second CM voltage divider is further be coupled to the ground signal via a fifth diode.

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