公开(公告)号：US11562902B2

公开(公告)日：2023-01-24

申请号：US16932793

申请日：2020-07-19

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Diwakar Kedlaya ,  Karthik Janakiraman ,  Gautam K. Hemani ,  Krishna Nittala ,  Alicia J. Lustgraaf ,  Zubin Huang ,  Brett Spaulding ,  Shashank Sharma ,  Kelvin Chan

IPC: H01L21/00 ,  H01L21/02 ,  C23C16/24 ,  C23C16/56 ,  C23C16/50

Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by less than or about 3% hydrogen incorporation.

公开(公告)号：US11443919B2

公开(公告)日：2022-09-13

申请号：US16785331

申请日：2020-02-07

Applicant: Applied Materials, Inc.

Inventor： Krishna Nittala ,  Diwakar N. Kedlaya ,  Karthik Janakiraman ,  Yi Yang ,  Rui Cheng

IPC: H01L21/02 ,  C23C16/515 ,  H01J37/32 ,  C23C16/505

Abstract: Systems and methods of using pulsed RF plasma to form amorphous and microcrystalline films are discussed herein. Methods of forming films can include (a) forming a plasma in a process chamber from a film precursor and (b) pulsing an RF power source to cause a duty cycle on time (TON) of a duty cycle of a pulse generated by the RF power source to be less than about 20% of a total cycle time (TTOT) of the duty cycle to form the film. The methods can further include (c) depositing a first film interlayer on a substrate in the process chamber; (d) subsequent to (c), purging the process chamber; and (e) subsequent to (d), introducing a hydrogen plasma to the process chamber. Further in the method, (b)-(e) are repeated to form a film. The film can have an in-film hydrogen content of less than about 10%.

公开(公告)号：US20220238331A1

公开(公告)日：2022-07-28

申请号：US17157307

申请日：2021-01-25

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rui Cheng ,  Shishi Jiang ,  Karthik Janakiraman

IPC: H01L21/02 ,  H01L21/3065 ,  H01L21/768 ,  H01J37/32

Abstract: Methods for gap filling features of a substrate surface are described. Each of the features extends a distance into the substrate from the substrate surface and have a bottom and at least one sidewall. The methods include depositing a non-conformal film in the feature of the substrate surface with a plurality of high-frequency ratio-frequency (HFRF) pulses. The non-conformal film has a greater thickness on the bottom of the features than on the at least one sidewall. The deposited film is substantially etched from the sidewalls of the feature. The deposition and etch processes are repeated to fill the features.

公开(公告)号：US11361991B2

公开(公告)日：2022-06-14

申请号：US16975794

申请日：2019-03-07

Applicant: Applied Materials, Inc.

Inventor： Xin Liu ,  Fei Wang ,  Rui Cheng ,  Abhijit Basu Mallick ,  Robert Jan Visser

IPC: H01L21/768 ,  C23C16/01 ,  C23C16/24 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02 ,  H01L21/3205 ,  H01L29/06

Abstract: Embodiments of the present disclosure relate to processes for filling trenches. The process includes depositing a first amorphous silicon layer on a surface of a layer and a second amorphous silicon layer in a portion of a trench formed in the layer, and portions of side walls of the trench are exposed. The first amorphous silicon layer is removed. The process further includes depositing a third amorphous silicon layer on the surface of the layer and a fourth amorphous silicon layer on the second amorphous silicon layer. The third amorphous silicon layer is removed. The deposition/removal cyclic processes may be repeated until the trench is filled with amorphous silicon layers. The amorphous silicon layers form a seamless amorphous silicon gap fill in the trench since the amorphous silicon layers are formed from bottom up.

公开(公告)号：US11328928B2

公开(公告)日：2022-05-10

申请号：US16444856

申请日：2019-06-18

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Abhijit Basu Mallick ,  Swaminathan Srinivasan ,  Rui Cheng ,  Susmit Singha Roy ,  Gaurav Thareja ,  Mukund Srinivasan ,  Sanjay Natarajan

IPC: H01L21/225 ,  H01L21/30 ,  H01L21/02 ,  H01L21/67

Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

公开(公告)号：US11170990B2

公开(公告)日：2021-11-09

申请号：US16795191

申请日：2020-02-19

Applicant: Applied Materials, Inc.

Inventor： Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Praket Prakash Jha ,  Jinrui Guo ,  Jingmei Liang

IPC: H01L21/02

Abstract: Aspects of the disclosure provide a method including depositing an underlayer comprising silicon oxide over a substrate, depositing a polysilicon liner on the underlayer, and depositing an amorphous silicon layer on the polysilicon liner. Aspects of the disclosure provide a device intermediate including a substrate, an underlayer comprising silicon oxide formed over the substrate, a polysilicon liner disposed on the underlayer, and an amorphous silicon layer disposed on the polysilicon liner.

公开(公告)号：US10559465B2

公开(公告)日：2020-02-11

申请号：US15988771

申请日：2018-05-24

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Yi Yang ,  Yihong Chen ,  Karthik Janakiraman ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L21/205 ,  H01L21/033 ,  H01L21/3205 ,  H01L21/308 ,  H01L21/311

Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.

公开(公告)号：US20180350597A1

公开(公告)日：2018-12-06

申请号：US16001251

申请日：2018-06-06

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Fei Wang ,  Abhijit Basu Mallick ,  Robert Jan Visser

IPC: H01L21/02 ,  H01L21/3065

Abstract: Methods for selective silicon film deposition on a substrate comprising a first surface and a second surface are described. More specifically, the process of depositing a film, treating the film to change some film property and selectively etching the film from various surfaces of the substrate are described. The deposition, treatment and etching can be repeated to selectively deposit a film on one of the two substrate surfaces.

公开(公告)号：US10128150B2

公开(公告)日：2018-11-13

申请号：US15083590

申请日：2016-03-29

Applicant: Applied Materials, Inc.

Inventor： Pramit Manna ,  Rui Cheng ,  Kelvin Chan ,  Abhijit Basu Mallick

IPC: C23C16/00 ,  H01L21/768 ,  H01L21/285 ,  C23C16/04 ,  C23C16/16 ,  C23C16/34 ,  C23C16/46

Abstract: Implementations of the present disclosure generally relate to methods for forming thin films in high aspect ratio feature definitions. In one implementation, a method of processing a substrate in a process chamber is provided. The method comprises flowing a boron-containing precursor comprising a ligand into an interior processing volume of a process chamber, flowing a nitrogen-containing precursor comprising the ligand into the interior processing volume and thermally decomposing the boron-containing precursor and the nitrogen-containing precursor in the interior processing volume to deposit a boron nitride layer over at least one or more sidewalls and a bottom surface of a high aspect ratio feature definition formed in and below a surface of a dielectric layer on the substrate.

公开(公告)号：US09640400B1

公开(公告)日：2017-05-02

申请号：US14961920

申请日：2015-12-08

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Abhijit Basu Mallick ,  Srinivas Gandikota ,  Pramit Manna

IPC: H01L21/336 ,  H01L21/225 ,  H01L29/66 ,  H01L21/324 ,  H01L21/02 ,  H01L29/167

CPC classification number: H01L21/2254 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/324 ,  H01L29/167 ,  H01L29/66795 ,  H01L29/66803

Abstract: Embodiments described herein generally relate to doping of three dimensional (3D) structures on a substrate. In one embodiment, a conformal dopant containing film may be deposited over the 3D structures. Suitable dopants that may be incorporated in the film may include boron, phosphorous, and other suitable dopants. The film may be subsequently annealed to diffuse the dopants into the 3D structures.