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公开(公告)号：US11579897B2
公开(公告)日：2023-02-14
申请号：US17442541
申请日：2020-09-25
Applicant: Intel Corporation
Inventor： Katalin Klara Bartfai-Walcott , Arkadiusz Berent , Vasuki Chilukuri , Mark Baldwin , Vasudevan Srinivasan , Naresh Sehgal , David Novick , Bartosz Gotowalski
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) for software defined silicon security are disclosed. Example apparatus include a trusted agent determiner to (i) determine respective reputation scores associated with a plurality of agents in a mesh network, the plurality of agents associated with a plurality of semiconductor devices, respective ones of the semiconductor devices including circuitry configurable to provide one or more features, and (ii) select, based on the respective reputation scores, a first agent from the plurality of the agents to transmit a request to activate or deactivate at least one of the one or more features. Example apparatus also include an agent interface to, in response to the request, broadcast an activation or deactivation of the least one of the one or more features to the mesh network to cause the trusted agent determiner to update the reputation score of the first agent.
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公开(公告)号：US11144085B2
公开(公告)日：2021-10-12
申请号：US15632000
申请日：2017-06-23
Applicant: Intel Corporation
Inventor： Asma H. Al-Rawi , Federico Ardanaz , Jonathan M. Eastep , Dorit Shapira , Krishnakanth Sistla , Nikhil Gupta , Vasudevan Srinivasan , Chris MacNamara
Abstract: An apparatus system is provided which comprises: a first component and a second component; a first circuitry to assign the first component to a first group of components, and to assign the second component to a second group of components; and a second circuitry to assign a first maximum frequency limit to the first group of components, and to assign a second maximum frequency limit to the second group of components, wherein the first component and the second component are to respectively operate in accordance with the first maximum frequency limit and the second maximum frequency limit.
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公开(公告)号：US20210012445A1
公开(公告)日：2021-01-14
申请号：US17033200
申请日：2020-09-25
Applicant: Intel Corporation
Inventor： Katalin Klara Bartfai-Walcott , Mark Baldwin , Arkadiusz Berent , Bartosz Gotowalski , Vasuki Chilukuri , Vasudevan Srinivasan , Justyna Chilczuk , Vinila Rose , Mariusz Oriol
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement software defined silicon feature licensing are disclosed. Example licensor systems disclosed herein includes a third party verifier to verify one or more credentials included in a request to become an authorized delegated licensor, the request received from a third party. Disclosed example licensor systems also include a feature identifier to identify a feature of a silicon structure which the third party is to be granted the authority to license. Disclosed example licensor systems further include a configuration installation code generator to generate feature configuration installation code, the feature configuration installation code to be used by the third party to generate at least a portion of the license, the portion of the license to be used by a licensee to configure the silicon structure to access the licensed feature, and contents of the feature configuration installation code encrypted to prevent access by the authorized delegated licensor.
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公开(公告)号：US20190053397A1
公开(公告)日：2019-02-14
申请号：US15870721
申请日：2018-01-12
Applicant: Intel Corporation
Inventor： Thane M. Larson , Vasudevan Srinivasan , Murugasmy K. Nachimuthu , Brian J. Griffith
IPC: H05K7/14
Abstract: The present disclosure describes a number of embodiments related to devices, systems, and methods for identifying a location of a resource among a plurality of locations in a data center rack. A signal transmission medium may be disposed proximate to the plurality of locations to transmit a signal traversing the plurality of locations, with each resource in the rack having a sensor or transmitter portion that couples itself to the signal transmission medium at a point substantially at this resource location, or the location of the resource within the data center rack is identified based at least in part on the sensed signal.
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Patent Agency Ranking
45.发明申请公开(公告)号：US20190041925A1
公开(公告)日：2019-02-07
申请号：US15938291
申请日：2018-03-28
Applicant: Intel Corporation
Inventor： Sandeep Ahuja , Nikhil Gupta , Vasudevan Srinivasan
Abstract: In one embodiment, a processor includes a non-volatile storage to store a plurality of configurations for the processor, the non-volatile storage including a plurality of entries to store configuration information for the processor for one of the plurality of configurations, the configuration information including at least one of a guaranteed operating frequency and a core count, at least one of the entries to store the core count. The processor further includes a power controller to control the processor to operate at one of the plurality of configurations based at least in part on a selected thermal set point of a plurality of thermal set points of the processor, each of the plurality of thermal set points associated with one of the configurations. Other embodiments are described and claimed.
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公开(公告)号：US09766673B2
公开(公告)日：2017-09-19
申请号：US14633438
申请日：2015-02-27
Applicant: Intel Corporation
Inventor： Ankush Varma , Vasudevan Srinivasan , Eugene Gorbatov , Andrew D. Henroid , Barnes Cooper , David W. Browning , Guy M. Therien , Neil W. Songer , Krishnakanth V. Sistla , James G. Hermerding, II
CPC classification number: G06F1/263 , G06F1/206 , G06F1/3212 , G06F1/324 , G06F15/00 , Y02D10/126 , Y02D10/16 , Y02D10/174
Abstract: In one embodiment, a system includes: a plurality of compute nodes to couple in a chassis; a first shared power supply to provide a baseline power level to the plurality of compute nodes; and an auxiliary power source to provide power to one or more of the plurality of compute nodes during operation at a higher power level than the baseline power level. Other embodiments are described and claimed.
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公开(公告)号：US09612643B2
公开(公告)日：2017-04-04
申请号：US14229864
申请日：2014-03-29
Applicant: Intel Corporation
Inventor： Alexander B. Uan-Zo-Li , Don J. Nguyen , Gang Ji , Philip R. Lehwalder , Jorge P. Rodriguez , Vasudevan Srinivasan
IPC: G06F1/32
CPC classification number: G06F1/3234 , G06F1/3206 , G06F1/3212 , G06F1/324 , G06F1/3243 , Y02D10/126 , Y02D10/152 , Y02D10/174
Abstract: Methods and apparatus relating to controlling processor slew rates based on battery charge state/level are described. In one embodiment, logic causes modification to a slew rate of a processor based on at least a charge level of a battery pack. Other embodiments are also disclosed and claimed.
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公开(公告)号：US09541991B2
公开(公告)日：2017-01-10
申请号：US13715810
申请日：2012-12-14
Applicant: INTEL CORPORATION
Inventor： Alexander B. Uan-Zo-Li , Jorge P. Rodriguez , Philip R. Lehwalder , Patrick K. Leung , James G. Hermerding, II , Vasudevan Srinivasan
CPC classification number: G06F1/3296 , G06F1/28 , G06F1/3212 , Y02D10/172 , Y02D10/174
Abstract: An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level.
Abstract translation: 装置可以包括耦合到一个或多个平台组件的第一电路，第一电路可操作以接收未滤波的输入电压信号，将未滤波的输入电压信号的第一电压电平与第一参考电压电平进行比较，并产生操作的控制信号 以当所述第一电压电平小于所述第一参考电压电平时降低所述一个或多个平台组件中的一个或多个的操作功率。
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公开(公告)号：US09411398B2
公开(公告)日：2016-08-09
申请号：US13630846
申请日：2012-09-28
Applicant: INTEL CORPORATION
Inventor： Gang Ji , Alexander B. Uan-Zo-Li , Jorge P. Rodriguez , Andy Keates , Vasudevan Srinivasan
CPC classification number: G06F1/3212 , G06F1/324 , Y02D10/126 , Y02D10/174
Abstract: An electronic apparatus is provided that includes a processor, a voltage regulator, a battery controller and an embedded controller. The voltage regulator to receive an input voltage and to provide an output voltage to the processor. The battery controller to store electronic device information and to receive battery information related to a current battery power. The embedded controller to receive the electronic device information and the battery information from the battery controller, and the embedded controller to provide power information to the processor based on the received information.
Abstract translation: 提供一种电子设备，其包括处理器，电压调节器，电池控制器和嵌入式控制器。 电压调节器接收输入电压并向处理器提供输出电压。 电池控制器，用于存储电子设备信息并接收与当前电池电力相关的电池信息。 嵌入式控制器从电池控制器接收电子设备信息和电池信息，以及嵌入式控制器，基于接收到的信息向处理器提供电源信息。
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