公开(公告)号：US09293444B2

公开(公告)日：2016-03-22

申请号：US14837576

申请日：2015-08-27

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Belgacem Haba ,  Wael Zohni

IPC: H01L23/02 ,  H01L25/065 ,  H01L23/12 ,  H01L23/50

CPC classification number: H01L25/0657 ,  H01L23/12 ,  H01L23/13 ,  H01L23/50 ,  H01L24/06 ,  H01L24/09 ,  H01L2224/023 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/09151 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01322 ,  H01L2924/14361 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0248 ,  H05K1/112 ,  H05K1/181 ,  H05K3/3415 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microelectronic package has a dielectric element with first and second parallel apertures. A first microelectronic element has contacts overlying the first aperture, and a second microelectronic element has contacts overlying the second aperture. The second microelectronic element can overlie a rear face of the first microelectronic element and the same surface of the dielectric element as the first microelectronic element. First terminals on a second surface of the dielectric element between said first and second apertures can be configured to carry all data signals for read and write access to memory locations within the first and second microelectronic elements.

公开(公告)号：US20150325562A1

公开(公告)日：2015-11-12

申请号：US14806993

申请日：2015-07-23

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L25/00 ,  H01L21/3105 ,  H01L23/00 ,  H01L21/78 ,  H01L25/065

CPC classification number: H01L21/56 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/50 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A first area of a first surface of an encapsulated component can be thinned, the component including: a semiconductor chip having an active surface opposite the first surface, and an encapsulant extending outwardly from edges of the semiconductor chip. An entire area of the active surface may be aligned with the first area. After the abrading, a second area of the encapsulated component beyond the first area may have a thickness greater than a thickness of the first area. The second area can be configured to fully support the abraded encapsulated component in a state of the encapsulated component being manipulated by handling equipment.

Abstract translation: 封装部件的第一表面的第一区域可以变薄，所述部件包括：具有与第一表面相对的有效表面的半导体芯片以及从半导体芯片的边缘向外延伸的密封剂。 有源表面的整个区域可以与第一区域对齐。 在研磨之后，超过第一区域的包封组分的第二区域可以具有大于第一区域的厚度的厚度。 第二区域可以被配置为在被处理设备操纵的封装部件的状态下完全支撑磨损的封装部件。

公开(公告)号：US20150302901A1

公开(公告)日：2015-10-22

申请号：US14753607

申请日：2015-06-29

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Yong Chen ,  Belgacem Haba ,  Wael Zohni ,  Zhuowen Sun

IPC: G11C5/02 ,  G11C5/06 ,  G11C11/408 ,  G11C5/04

CPC classification number: G11C5/025 ,  G11C5/04 ,  G11C5/063 ,  G11C8/12 ,  G11C11/408 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/00 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1436 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic package can include a support element having first and second surfaces and substrate contacts at the first or second surface, zeroth and first stacked microelectronic elements electrically coupled with the substrate contacts, and terminals at the second surface electrically coupled with the microelectronic elements. The second surface can have a southwest region encompassing entire lengths of south and west edges of the second surface and extending in orthogonal directions from the south and west edges one-third of each distance toward north and east edges of the second surface, respectively. The terminals can include first terminals at a southwest region of the second surface, the first terminals configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of the memory storage arrays of at least one of the zeroth or first microelectronic elements.

Abstract translation: 微电子封装可以包括具有第一和第二表面的第一表面和第二表面的支撑元件以及与第一表面或第二表面的第一和第二堆叠的微电子元件，以及与第二表面电连接的第二表面的端子与微电子元件电耦合。 第二表面可以具有包括第二表面的南部和西部边缘的整个长度的西南区域，并且在从每个距离的南部和西部边缘的正交方向上分别向第二表面的北部和东部边缘延伸。 终端可以包括在第二表面的西南区域的第一终端，第一终端被配置为携带可用于微电子封装内的电路的地址信息，以从存储器存储阵列的所有可寻址的存储器位置中确定可寻址存储器位置 第一或第一微电子元件中的至少一个。

公开(公告)号：US09153533B2

公开(公告)日：2015-10-06

申请号：US13800313

申请日：2013-03-13

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  David Fisch

IPC: G06F13/00 ,  G06F13/36 ,  G11C5/06 ,  H01L23/525 ,  H01L27/06 ,  G11C5/02 ,  G11C7/10 ,  G11C7/20 ,  H01L23/00

CPC classification number: H01L23/5256 ,  G11C5/02 ,  G11C7/10 ,  G11C7/20 ,  H01L24/06 ,  H01L24/16 ,  H01L27/06 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A semiconductor chip that may be configured to function as either a master chip or a slave chip. The semiconductor chip may be included in a microelectronic assembly including a plurality of vertically stacked semiconductor chips, with each of the chips containing functional circuit blocks that enable each semiconductor chip to function as either a master chip or a slave chip under in accordance with a state input stored on the same chip, or received from another chip in the stacked assembly or from another component of a system in which the stacked assembly is configured to operate.

Abstract translation: 可以被配置为用作主芯片或从芯片的半导体芯片。 半导体芯片可以包括在包括多个垂直堆叠的半导体芯片的微电子组件中，其中每个芯片包含功能电路块，其使得每个半导体芯片能够根据状态作为主芯片或从芯片 输入存储在同一芯片上，或者从堆叠组件中的另一个芯片或从堆叠组件配置为运行的系统的另一个组件接收。

公开(公告)号：US20150279823A1

公开(公告)日：2015-10-01

申请号：US14230388

申请日：2014-03-31

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Liang Wang

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81805 ,  H01L2224/92125 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15333 ,  H01L2924/014 ,  H01L2924/00

Abstract: A microelectronic assembly can be made by joining first and second subassemblies by electrically conductive masses to connect electrically conductive elements on support elements of each subassembly. A patterned layer of photo-imageable material may overlie a surface of one of the support elements and have openings with cross-sectional dimensions which are constant or monotonically increasing with height from the surface of that support element, where the masses extend through the openings and have dimensions defined thereby. An encapsulation can be formed by flowing an encapsulant into a space between the joined first and second subassemblies.

Abstract translation: 微电子组件可以通过用导电块连接第一和第二子组件来连接每个子组件的支撑元件上的导电元件来制造。 可光成像材料的图案层可以覆盖在一个支撑元件的表面上，并且具有开口，其横截面尺寸与该支撑元件的表面的高度不变或单调地增加，其中质量延伸穿过开口和 具有由此定义的尺寸。 可以通过将密封剂流入连接的第一和第二子组件之间的空间来形成封装。

公开(公告)号：US09123600B2

公开(公告)日：2015-09-01

申请号：US13778654

申请日：2013-02-27

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni ,  Ilyas Mohammed

IPC: H01L21/00 ,  H01L23/13 ,  H01L23/538 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/525 ,  H01L25/10

CPC classification number: H01L23/5386 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/525 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package has multiple chips that may be arranged side-by-side or in a staggered, stair step arrangement. The contacts of the chips are connected to interconnect pads carried on the chips themselves or on a redistribution substrate. The interconnect pads desirably are arranged in a relatively narrow interconnect zone, such that the interconnect pads can be readily wire-bonded or otherwise connected to a package substrate.

Abstract translation: 芯片封装具有多个芯片，可以并排布置或以交错的台阶布置布置。 芯片的触点连接到芯片本身或再分布基板上承载的互连焊盘。 互连焊盘理想地布置在相对窄的互连区域中，使得互连焊盘可以容易地线接合或以其他方式连接到封装衬底。

公开(公告)号：US09123555B2

公开(公告)日：2015-09-01

申请号：US14063119

申请日：2013-10-25

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Belgacem Haba ,  Wael Zohni

IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50

CPC classification number: H01L25/0657 ,  H01L23/12 ,  H01L23/13 ,  H01L23/50 ,  H01L24/06 ,  H01L24/09 ,  H01L2224/023 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/09151 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01322 ,  H01L2924/14361 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0248 ,  H05K1/112 ,  H05K1/181 ,  H05K3/3415 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microelectronic package has a dielectric element with first and second parallel apertures. A first microelectronic element has contacts overlying the first aperture, and a second microelectronic element has contacts overlying the second aperture. The second microelectronic element can overlie a rear face of the first microelectronic element and the same surface of the dielectric element as the first microelectronic element. First terminals on a second surface of the dielectric element between said first and second apertures can be configured to carry all data signals for read and write access to memory locations within the first and second microelectronic elements.

Abstract translation: 微电子封装具有带有第一和第二平行孔的电介质元件。 第一微电子元件具有覆盖第一孔的触点，并且第二微电子元件具有覆盖第二孔的触点。 第二微电子元件可以覆盖第一微电子元件的后表面和与第一微电子元件相同的介质元件的表面。 位于所述第一和第二孔之间的电介质元件的第二表面上的第一端子可被配置为承载用于对第一和第二微电子元件内的存储器位置的读取和写入访问的所有数据信号。

公开(公告)号：US20150076714A1

公开(公告)日：2015-03-19

申请号：US14027571

申请日：2013-09-16

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni

IPC: H01L23/49 ,  H01L21/48

CPC classification number: H01L25/0657 ,  H01L21/4846 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L24/745 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1134 ,  H01L2224/1184 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13624 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/14051 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/32145 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/742 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/92142 ,  H01L2224/92143 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/207 ,  H01L2224/83 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00

Abstract: A microelectronic structure includes a semiconductor having conductive elements at a first surface. Wire bonds have bases joined to the conductive elements and free ends remote from the bases, the free ends being remote from the substrate and the bases and including end surfaces. The wire bonds define edge surfaces between the bases and end surfaces thereof. A compliant material layer extends along the edge surfaces within first portions of the wire bonds at least adjacent the bases thereof and fills spaces between the first portions of the wire bonds such that the first portions of the wire bonds are separated from one another by the compliant material layer. Second portions of the wire bonds are defined by the end surfaces and portions of the edge surfaces adjacent the end surfaces that are extend from a third surface of the compliant later.

Abstract translation: 微电子结构包括在第一表面具有导电元件的半导体。 线接合具有接合到导电元件和远离基座的自由端的基部，自由端远离基板和基部并且包括端面。 线接合限定其基端和端面之间的边缘表面。 顺应性材料层沿着线的第一部分中的边缘表面延伸，至少邻近其底部，并且填充引线接合的第一部分之间的空间，使得引线接合的第一部分通过顺应性 材料层。 线接合的第二部分由邻近端表面的端表面和边缘表面的部分限定，其从较柔性的第三表面延伸。

公开(公告)号：US20150034371A1

公开(公告)日：2015-02-05

申请号：US14517268

申请日：2014-10-17

Applicant: INVENSAS CORPORATION

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Terrence Caskey ,  Reynaldo Co ,  Ellis Chau

IPC: H05K1/18

CPC classification number: H05K1/11 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/528 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1191 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13101 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14135 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/32225 ,  H01L2224/45012 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/0298 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/10515 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/014

Abstract: A structure may include bond elements having bases joined to conductive elements at a first portion of a first surface and end surfaces remote from the substrate. A dielectric encapsulation element may overlie and extend from the first portion and fill spaces between the bond elements to separate the bond elements from one another. The encapsulation element has a third surface facing away from the first surface. Unencapsulated portions of the bond elements are defined by at least portions of the end surfaces uncovered by the encapsulation element at the third surface. The encapsulation element at least partially defines a second portion of the first surface that is other than the first portion and has an area sized to accommodate an entire area of a microelectronic element. Some conductive elements are at the second portion and configured for connection with such microelectronic element.

Abstract translation: 结构可以包括在第一表面的第一部分和远离基底的端表面处具有连接到导电元件的基底的结合元件。 电介质封装元件可以从第一部分覆盖并延伸并填充接合元件之间的空间，以将接合元件彼此分开。 封装元件具有背离第一表面的第三表面。 粘合元件的未封装部分由在第三表面处被封装元件未覆盖的至少部分端面限定。 封装元件至少部分地限定除了第一部分之外的第一表面的第二部分，并且具有尺寸适于容纳微电子元件的整个区域的区域。 一些导电元件位于第二部分并被配置为与这种微电子元件连接。

公开(公告)号：US20150017763A1

公开(公告)日：2015-01-15

申请号：US14500874

申请日：2014-09-29

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Simon McElrea

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/83 ,  H01L21/56 ,  H01L21/563 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/3737 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81207 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/81805 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12 ,  H01L2924/12042 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15151 ,  H01L2924/186 ,  H01L2924/20106 ,  H01L2924/2064 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A microelectronic assembly may include a microelectronic element having a surface and a plurality of contacts at the surface; a first element consisting essentially of at least one of semiconductor or dielectric material, the first element having a surface facing the surface of the microelectronic element and a plurality of first element contacts at the surface of the first element; electrically conductive masses each joining a contact of the plurality of contacts of the microelectronic element with a respective first element contact of the plurality of first element contacts; a thermally and electrically conductive material layer between the surface of the microelectronic element and the surface of the first element and adjacent conductive masses of the conductive masses; and an electrically insulating coating electrically insulating the conductive masses and the surfaces of the microelectronic element and the first element from the thermally and electrically conductive material layer

Abstract translation: 微电子组件可以包括在表面具有表面和多个触点的微电子元件; 基本上由半导体或电介质材料中的至少一种组成的第一元件，第一元件具有面向微电子元件的表面的表面和在第一元件的表面处的多个第一元件接触; 每个导电块将微电子元件的多个触点的接触与多个第一元件触点的相应的第一元件触点接合; 在所述微电子元件的表面与所述第一元件的表面和所述导电块的相邻导电块之间的导热材料层; 以及电绝缘涂层，其将导电块和微电子元件和第一元件的表面与导热材料层电绝缘