公开(公告)号：US09722139B2

公开(公告)日：2017-08-01

申请号：US13863423

申请日：2013-04-16

Applicant: Sensor Electronic Technology, Inc.

Inventor： Wenhong Sun ,  Alexander Dobrinsky ,  Maxim S Shatalov ,  Jinwei Yang ,  Michael Shur ,  Remigijus Gaska

IPC: H01L33/06 ,  H01L33/00 ,  H01L21/02 ,  H01L33/04

CPC classification number: H01L33/06 ,  H01L21/02389 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L33/0066 ,  H01L33/0075 ,  H01L33/04

Abstract: A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.

公开(公告)号：US09691939B2

公开(公告)日：2017-06-27

申请号：US14822508

申请日：2015-08-10

Applicant: Sensor Electronic Technology, Inc.

Inventor： Rakesh Jain ,  Wenhong Sun ,  Jinwei Yang ,  Maxim S. Shatalov ,  Alexander Dobrinsky ,  Michael Shur ,  Remigijus Gaska

IPC: H01L33/12 ,  H01L33/22 ,  H01L33/32 ,  H01L33/24 ,  H01L21/02 ,  H01L29/778 ,  H01L29/20 ,  H01L29/51

CPC classification number: H01L33/12 ,  C30B25/04 ,  C30B25/183 ,  C30B29/406 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/518 ,  H01L29/7786 ,  H01L29/7787 ,  H01L33/06 ,  H01L33/10 ,  H01L33/145 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/405 ,  H01L2933/0091

Abstract: A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.

公开(公告)号：US20170179335A1

公开(公告)日：2017-06-22

申请号：US15391948

申请日：2016-12-28

Applicant: Sensor Electronic Technology, Inc.

Inventor： Daniel Billingsley ,  Robert M. Kennedy ,  Wenhong Sun ,  Rakesh Jain ,  Maxim S. Shatalov ,  Alexander Dobrinsky ,  Michael Shur ,  Remigijus Gaska

IPC: H01L33/00 ,  H01L29/66 ,  H01L29/778 ,  H01L33/32 ,  H01L33/12

CPC classification number: H01L33/0025 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/24 ,  H01L33/32 ,  H01L2224/16225

Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

公开(公告)号：US09653313B2

公开(公告)日：2017-05-16

申请号：US15144064

申请日：2016-05-02

Applicant: Sensor Electronic Technology, Inc.

Inventor： Maxim S. Shatalov ,  Jinwei Yang ,  Wenhong Sun ,  Rakesh Jain ,  Michael Shur ,  Remigijus Gaska

IPC: H01L29/15 ,  H01L31/0256 ,  H01L21/308 ,  H01L29/66 ,  H01L21/02 ,  H01L29/20 ,  H01L33/00 ,  H01L33/12

CPC classification number: H01L21/308 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265 ,  H01L29/158 ,  H01L29/2003 ,  H01L29/66075 ,  H01L33/007 ,  H01L33/12

Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.

公开(公告)号：US20170005228A1

公开(公告)日：2017-01-05

申请号：US15265975

申请日：2016-09-15

Applicant: Sensor Electronic Technology, Inc.

Inventor： Daniel Billingsley ,  Robert M. Kennedy ,  Wenhong Sun ,  Rakesh Jain ,  Maxim S. Shatalov ,  Alexander Dobrinsky ,  Michael Shur ,  Remigijus Gaska

IPC: H01L33/12 ,  H01L33/06 ,  H01L29/15 ,  H01L33/00 ,  H01L29/20 ,  H01L33/32 ,  H01L21/02

CPC classification number: H01L33/12 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/155 ,  H01L29/2003 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/20 ,  H01L33/24 ,  H01L33/32 ,  H01L2224/16225

Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

Abstract translation: 提供了用于制造光电子器件的异质结构。 异质结构包括诸如n型接触或包覆层的层，其包括插入其中的薄子层。 薄的子层可以遍及整个层间隔开，并由用于该层的材料制成的中间子层隔开。 薄的子层可以具有与插入的子层不同的组成，其在异质结构的生长期间改变应力存在。

公开(公告)号：US20160247885A1

公开(公告)日：2016-08-25

申请号：US15144064

申请日：2016-05-02

Applicant: Sensor Electronic Technology, Inc.

Inventor： Maxim S. Shatalov ,  Jinwei Yang ,  Wenhong Sun ,  Rakesh Jain ,  Michael Shur ,  Remigijus Gaska

IPC: H01L29/201 ,  H01L21/308 ,  H01L29/78 ,  H01L29/15 ,  H01L29/66

CPC classification number: H01L21/308 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265 ,  H01L29/158 ,  H01L29/2003 ,  H01L29/66075 ,  H01L33/007 ,  H01L33/12

Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.

公开(公告)号：US20140326950A1

公开(公告)日：2014-11-06

申请号：US14266900

申请日：2014-05-01

Applicant: Sensor Electronic Technology, Inc.

Inventor： Maxim S. Shatalov ,  Jinwei Yang ,  Wenhong Sun ,  Rakesh Jain ,  Michael Shur ,  Remigijus Gaska

IPC: H01L29/06

CPC classification number: H01L29/158 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L33/007 ,  H01L33/12

Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.

Abstract translation: 提供了诸如III族氮化物基半导体结构的半导体结构。 半导体结构包括含有半导体层的空腔。 含腔的半导体层可以具有大于两个单层和多个空腔的厚度。 空腔可以具有至少一纳米的特征尺寸和至少五纳米的特征分离。