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    Hardware sizing
    41.
    发明授权
    Hardware sizing 有权
    硬件尺寸

    公开(公告)号：US08806080B1

    公开(公告)日：2014-08-12

    申请号：US13832174

    申请日：2013-03-15

    Applicant: International Business Machines Corporation

    Inventor： Joseph L. Temple, III

    IPC: G06F11/34 ,  G06F3/00

    CPC classification number: G06F11/3428 ,  G06F11/3442 ,  G06F2201/88 ,  G06F2201/885

    Abstract: According to an exemplary embodiment of this disclosure, a computer-implemented method may include selecting a first machine to be sized. A first throughput value and a first capacity value may be obtained for the first machine. A base machine may be selected. A base throughput value and a base capacity value may be obtained for the base machine. The first throughput value may be normalized, with a computer processor, to the base throughput value to product a normalized throughput value. The first capacity value may be normalized to the base capacity value to produce a normalized capacity value. A workload weight may be determined for the first machine, based at least in part on comparing the first machine to the base machine. A workload metric may be calculated as a weighted average of the normalized throughput value and the normalized capacity value.

    Abstract translation: 根据本公开的示例性实施例，计算机实现的方法可以包括选择要定尺寸的第一机器。 可以获得第一机器的第一吞吐量值和第一容量值。 可以选择基本机器。 可以为基本机器获得基本吞吐量值和基本容量值。 第一吞吐量值可以用计算机处理器归一化为基本吞吐量值，以产生归一化吞吐量值。 可以将第一容量值归一化为基本容量值以产生归一化容量值。 可以至少部分地基于将第一机器与基本机器进行比较来确定第一机器的工作负载重量。 可以将工作量度量计算为归一化吞吐量值和归一化容量值的加权平均值。

    MONITORING MULTIPLE MEMORY LOCATIONS FOR TARGETED STORES IN A SHARED-MEMORY MULTIPROCESSOR
    42.
    发明申请
    MONITORING MULTIPLE MEMORY LOCATIONS FOR TARGETED STORES IN A SHARED-MEMORY MULTIPROCESSOR 有权
    监控共享存储器多重处理器中的针对存储器的多个存储器位置

    公开(公告)号：US20140215157A1

    公开(公告)日：2014-07-31

    申请号：US13754700

    申请日：2013-01-30

    Applicant: ORACLE INTERNATIONAL CORPORATION

    Inventor： Mark S. Moir ,  Paul N. Loewenstein ,  David Dice

    IPC: G06F12/08

    CPC classification number: G06F12/0811 ,  G06F9/30043 ,  G06F9/30047 ,  G06F11/3037 ,  G06F11/3096 ,  G06F12/0831 ,  G06F2201/885

    Abstract: A system and method for supporting targeted stores in a shared-memory multiprocessor. A targeted store enables a first processor to push a cache line to be stored in a cache memory of a second processor. This eliminates the need for multiple cache-coherence operations to transfer the cache line from the first processor to the second processor. More specifically, the disclosed embodiments provide a system that notifies a waiting thread when a targeted store is directed to monitored memory locations. During operation, the system receives a targeted store which is directed to a specific cache in a shared-memory multiprocessor system. In response, the system examines a destination address for the targeted store to determine whether the targeted store is directed to a monitored memory location which is being monitored for a thread associated with the specific cache. If so, the system informs the thread about the targeted store.

    Abstract translation: 用于在共享存储器多处理器中支持目标存储的系统和方法。 目标商店使得第一处理器能够将要存储在第二处理器的高速缓冲存储器中的高速缓存行推送。 这消除了对多个高速缓存相干操作的需要，以将高速缓存行从第一处理器传送到第二处理器。 更具体地，所公开的实施例提供了当目标商店被引导到被监视的存储器位置时通知等待线程的系统。 在操作期间，系统接收目标商店，其被定向到共享存储器多处理器系统中的特定高速缓存。 作为响应，系统检查目标商店的目的地地址，以确定目标商店是否被定向到被监视的与特定高速缓存相关联的线程的监视的存储器位置。 如果是这样，系统通知线程有关目标商店。

    Policy driven autonomic performance data collection
    43.
    发明授权
    Policy driven autonomic performance data collection 有权
    政策驱动的自主性绩效数据收集

    公开(公告)号：US08793694B2

    公开(公告)日：2014-07-29

    申请号：US12393395

    申请日：2009-02-26

    Applicant: Rachel Jackson ,  Paul Kettley

    Inventor： Rachel Jackson ,  Paul Kettley

    IPC: G06F9/46

    CPC classification number: G06F11/3466 ,  G06F11/3419 ,  G06F2201/885

    Abstract: An autonomic method, apparatus, and program product are provided for performance data collection. A start time and a stop time are monitored for an application. The start time is compared with the stop time to determine whether or not the application is meeting a performance target of the application. If the application is not meeting the performance target for the application, performance data collection is autonomically started for the application.

    Abstract translation: 提供自动方法，仪器和程序产品用于性能数据收集。 监控应用程序的开始时间和停止时间。 将开始时间与停止时间进行比较，以确定应用程序是否满足应用程序的性能目标。 如果应用程序不符合应用程序的性能目标，则应用程序自动启动性能数据收集。

    STORAGE SYSTEM
    44.
    发明申请
    STORAGE SYSTEM 审中-公开
    存储系统

    公开(公告)号：US20140208009A1

    公开(公告)日：2014-07-24

    申请号：US14220602

    申请日：2014-03-20

    Applicant: Hitachi, Ltd.

    Inventor： TOMOHIRO YOSHIHARA ,  Akira Deguchi ,  Hiroaki Akutsu

    IPC: G06F12/08 ,  G06F12/02

    CPC classification number: G06F12/084 ,  G06F11/2041 ,  G06F11/2043 ,  G06F11/2074 ,  G06F11/3409 ,  G06F11/3419 ,  G06F11/3433 ,  G06F11/3485 ,  G06F12/0246 ,  G06F12/0817 ,  G06F12/0866 ,  G06F2201/81 ,  G06F2201/855 ,  G06F2201/88 ,  G06F2201/885 ,  G06F2212/466

    Abstract: A storage system in an embodiment of this invention comprises a non-volatile storage area for storing write data from a host, a cache area capable of temporarily storing the write data before storing the write data in the non-volatile storage area, and a controller that determines whether to store the write data in the cache area or to store the write data in the non-volatile storage area without storing the write data in the cache area, and stores the write data in the determined area.

    Abstract translation: 本发明实施例的存储系统包括用于存储来自主机的写入数据的非易失性存储区域，能够在将写入数据存储在非易失性存储区域之前临时存储写入数据的高速缓存区域以及控制器 确定是否将写入数据存储在高速缓存区域中，或者将写入数据存储在非易失性存储区域中，而不将写入数据存储在高速缓存区域中，并将写入数据存储在确定的区域中。

    Mechanism for Page Replacement in Cache Memory
    45.
    发明申请
    Mechanism for Page Replacement in Cache Memory 有权
    高速缓存中页面替换的机制

    公开(公告)号：US20140156940A1

    公开(公告)日：2014-06-05

    申请号：US13690191

    申请日：2012-11-30

    Applicant: RED HAT, INC.

    Inventor： Johannes Weiner

    IPC: G06F12/08

    CPC classification number: G06F12/122 ,  G06F11/3452 ,  G06F12/0802 ,  G06F12/121 ,  G06F12/123 ,  G06F2201/885

    Abstract: A mechanism for page replacement for cache memory is disclosed. A method of the disclosure includes referencing an entry of a data structure of a cache in memory to identify a stored value of an eviction counter, the stored value of the eviction counter placed in the entry when a page of a file previously stored in the cache was evicted from the cache, determining a refault distance of the page of the file based on a difference between the stored value of the eviction counter and a current value of the eviction counter, and adjusting a ratio of cache lists maintained by the processing device to track pages in the cache, the adjusting based on the determined refault distance.

    Abstract translation: 公开了一种用于缓存存储器的页面替换的机制。 本公开的方法包括：引用存储器中的高速缓存的数据结构的条目以识别驱逐计数器的存储值，当先前存储在高速缓存中的文件的页面时，放置在条目中的逐出计数器的存储值 根据缓存计数器的存储值与驱逐计数器的当前值之间的差异，确定文件页面的反射距离，并且将由处理装置维护的高速缓存列表的比率调整为 在缓存中跟踪页面，根据确定的反射距离进行调整。

    REQUEST SENT TO STORAGE DEVICE BASED ON MOVING AVERAGE
    50.
    发明申请
    REQUEST SENT TO STORAGE DEVICE BASED ON MOVING AVERAGE 有权
    根据移动平均值要求存储设备

    公开(公告)号：US20140082249A1

    公开(公告)日：2014-03-20

    申请号：US13622942

    申请日：2012-09-19

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY

    Inventor： Weimin Pan ,  Mark Lyndon Oelke

    IPC: G06F13/16

    CPC classification number: G06F12/0888 ,  G06F11/1076 ,  G06F11/3419 ,  G06F11/3433 ,  G06F11/3485 ,  G06F11/349 ,  G06F12/0868 ,  G06F2201/81 ,  G06F2201/885 ,  G06F2212/1024

    Abstract: Embodiments herein relate to sending a request to a storage device based on a moving average. A threshold is determined based on a storage device type and a bandwidth of a cache bus connecting a cache to a controller. The moving average of throughput is measured between the storage device and a host. The request of the host to access the storage device is sent directly to the storage device, if the moving average is equal to the threshold.

    Abstract translation: 本文的实施例涉及基于移动平均线向存储设备发送请求。 基于将缓存连接到控制器的高速缓存总线的存储设备类型和带宽来确定阈值。 在存储设备和主机之间测量吞吐量的移动平均值。 如果移动平均值等于阈值，则主机访问存储设备的请求被直接发送到存储设备。

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