Sharded permissioned distributed ledgers

    公开(公告)号:US10740733B2

    公开(公告)日:2020-08-11

    申请号:US15605689

    申请日:2017-05-25

    Abstract: A sharded, permissioned, distributed ledger may reduce the amount of work and communication required by each participant, thus possibly avoiding scalability bottlenecks that may be inherent in previous distributed ledger implementations and possibly enabling the use of additional resources to translate to increased throughput. A sharded, permissioned, distributed ledger may be made up of multiple shards, each of which may also be a distributed ledger and which may operate in parallel. Participation within a sharded, permissioned, distributed ledger may be allowed only with permission of an authority. A sharded, permissioned, distributed ledger may include a plurality of nodes, each including a dispatcher configured to receive transaction requests from clients and to forward received requests to verifiers configured to append transactions to individual ones of the shards.

    System and method for implementing scalable contention-adaptive statistics counters
    2.
    发明授权
    System and method for implementing scalable contention-adaptive statistics counters 有权
    用于实现可扩展的争用自适应统计计数器的系统和方法

    公开(公告)号:US09183048B2

    公开(公告)日:2015-11-10

    申请号:US13722811

    申请日:2012-12-20

    CPC classification number: G06F9/4881 G06F9/52 G06F9/526

    Abstract: The systems and methods described herein may implement scalable statistics counters that are adaptive to the amount of contention for the counters. The counters may be accessible within transactions. Methods for determining whether or when to increment the counters in response to initiation of an increment operation and/or methods for updating the counters may be selected dependent on current, recent, or historical amounts of contention. Various contention management policies or retry conditions may be applied to select between multiple methods. One counter may include a precise counter portion that is incremented under low contention and a probabilistic counter portion that is updated under high contention. Amounts by which probabilistic counters are incremented may be contention-dependent. Another counter may include a node identifier portion that encourages consecutive increments by threads on a single node only when under contention. Another counter may be inflated in response to contention for the counter.

    Abstract translation: 本文描述的系统和方法可以实现可自适应于计数器的争用量的可伸缩统计计数器。 柜台可能在交易中可访问。 可以根据当前,最近或历史的争用量来选择用于响应于增量操作的启动来确定是否或何时增加计数器的方法和/或用于更新计数器的方法。 可以应用各种争用管理策略或重试条件来在多种方法之间进行选择。 一个计数器可以包括在低争用下递增的精确计数器部分和在高争用下更新的概率计数器部分。 概率计数器增加的金额可能是争用依赖的。 另一个计数器可以包括节点标识符部分,其仅在竞争时才鼓励单个节点上的线程的连续增量。 响应于柜台的争用,另一个柜台可能会膨胀。

    Systems and methods for adaptive integration of hardware and software lock elision techniques
    3.
    发明授权
    Systems and methods for adaptive integration of hardware and software lock elision techniques 有权
    硬件和软件锁定技术自适应集成的系统和方法

    公开(公告)号:US09183043B2

    公开(公告)日:2015-11-10

    申请号:US14254758

    申请日:2014-04-16

    Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application. In this Adaptive Lock Elision approach, the techniques may be selected (based on pluggable policies) at runtime to achieve good performance on different platforms and for different workloads.

    Abstract translation: 用于提高并发程序(例如基于锁的应用程序)的可扩展性的特殊技术在一些环境中以及对于一些工作负载而言可能是有效的,而不是其他工作负载。 基于当前环境中的应用和当前工作负载的观察,本文所述的系统可以自动选择在运行时执行基于锁的应用时应用的这些技术中适当的系统。 在一个示例中,可以集成两种用于提高锁可伸缩性的技术(例如,使用硬件事务存储器的事务锁定检测和乐观软件技术)。 为此目的而构建的轻量级运行时库可以通过在执行给定应用程序期间动态选择这些技术(在不同时间)中的一个或多个技术来调整其方法来管理并发性。 在这种自适应锁定Elision方法中,可以在运行时选择(基于可插拔策略)的技术,以在不同的平台和不同的工作负载下实现良好的性能。

    OBSTRUCTION-FREE DATA STRUCTURES AND MECHANISMS WITH SEPARABLE AND/OR SUBSTITUTABLE CONTENTION MANAGEMENT MECHANISMS
    4.
    发明申请
    OBSTRUCTION-FREE DATA STRUCTURES AND MECHANISMS WITH SEPARABLE AND/OR SUBSTITUTABLE CONTENTION MANAGEMENT MECHANISMS 审中-公开
    无障碍数据结构和具有可分离和/或可替换的内容管理机制的机制

    公开(公告)号:US20150269008A1

    公开(公告)日:2015-09-24

    申请号:US14733908

    申请日:2015-06-08

    Abstract: We teach a powerful approach that greatly simplifies the design of non-blocking mechanisms and data structures, in part by, largely separate the issues of correctness and progress. At a high level, our methodology includes designing an “obstruction-free” implementation of the desired mechanism or data structure, which may then be combined with a contention management mechanism whose role is to facilitate the conditions under which progress of the obstruction-free implementation is assured. In general, the contention management mechanism is separable semantically from an obstruction-free concurrent shared/sharable object implementation to which it is/may be applied. In some cases, the contention management mechanism may actually be coded separately from the obstruction-free implementation. We elaborate herein on the notions of obstruction-freedom and contention management, and various possibilities for combining the two. In addition, we include description of some exemplary applications to particular concurrent software mechanisms and data structure implementations.

    Abstract translation: 我们教授一种强大的方法,大大简化了非阻塞机制和数据结构的设计,部分原因是在很大程度上分离了正确性和进度的问题。 在高层次上,我们的方法包括设计一个“无障碍”的所需机制或数据结构的实现,然后将其与竞争管理机制结合起来,其作用是促进无障碍执行进展的条件 放心 一般来说,争用管理机制在语义上与可以应用于其的无障碍并发共享/可共享对象实现是可分离的。 在某些情况下,争用管理机制实际上可以与无障碍的实现分开编码。 我们在这里阐述了阻挠自由和争论管理的概念,以及结合两者的各种可能性。 此外,我们将特定并发软件机制和数据结构实现的一些示例性应用程序的描述。

    Monitoring multiple memory locations for targeted stores in a shared-memory multiprocessor
    5.
    发明授权
    Monitoring multiple memory locations for targeted stores in a shared-memory multiprocessor 有权
    监控共享内存多处理器中目标存储的多个内存位置

    公开(公告)号:US08990503B2

    公开(公告)日:2015-03-24

    申请号:US13754700

    申请日:2013-01-30

    Abstract: A system and method for supporting targeted stores in a shared-memory multiprocessor. A targeted store enables a first processor to push a cache line to be stored in a cache memory of a second processor. This eliminates the need for multiple cache-coherence operations to transfer the cache line from the first processor to the second processor. More specifically, the disclosed embodiments provide a system that notifies a waiting thread when a targeted store is directed to monitored memory locations. During operation, the system receives a targeted store which is directed to a specific cache in a shared-memory multiprocessor system. In response, the system examines a destination address for the targeted store to determine whether the targeted store is directed to a monitored memory location which is being monitored for a thread associated with the specific cache. If so, the system informs the thread about the targeted store.

    Abstract translation: 用于在共享存储器多处理器中支持目标存储的系统和方法。 目标商店使得第一处理器能够将要存储在第二处理器的高速缓冲存储器中的高速缓存行推送。 这消除了对多个高速缓存相干操作的需要,以将高速缓存行从第一处理器传送到第二处理器。 更具体地,所公开的实施例提供了当目标商店被引导到被监视的存储器位置时通知等待线程的系统。 在操作期间,系统接收目标商店,其被定向到共享存储器多处理器系统中的特定高速缓存。 作为响应,系统检查目标商店的目的地地址,以确定目标商店是否被引导到被监视的与特定高速缓存相关联的线程的监视的存储器位置。 如果是这样,系统通知线程有关目标商店。

    Systems and Methods for Adaptive Integration of Hardware and Software Lock Elision Techniques
    6.
    发明申请
    Systems and Methods for Adaptive Integration of Hardware and Software Lock Elision Techniques 有权
    硬件和软件锁定Elision技术的自适应集成系统和方法

    公开(公告)号:US20150026688A1

    公开(公告)日:2015-01-22

    申请号:US14254758

    申请日:2014-04-16

    Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application. In this Adaptive Lock Elision approach, the techniques may be selected (based on pluggable policies) at runtime to achieve good performance on different platforms and for different workloads.

    Abstract translation: 用于提高并发程序(例如基于锁的应用程序)的可扩展性的特殊技术在一些环境中以及对于一些工作负载而言可能是有效的,而不是其他工作负载。 基于当前环境中的应用和当前工作负载的观察,本文所述的系统可以自动选择在运行时执行基于锁的应用时应用的这些技术中适当的系统。 在一个示例中,可以集成两种用于提高锁可伸缩性的技术(例如,使用硬件事务存储器的事务锁定检测和乐观软件技术)。 为此目的而构建的轻量级运行时库可以通过在执行给定应用程序期间动态选择这些技术(在不同时间)中的一个或多个技术来调整其方法来管理并发性。 在这种自适应锁定Elision方法中,可以在运行时选择(基于可插拔策略)的技术,以在不同的平台和不同的工作负载下实现良好的性能。

    SUPPORTING TARGETED STORES IN A SHARED-MEMORY MULTIPROCESSOR SYSTEM
    7.
    发明申请
    SUPPORTING TARGETED STORES IN A SHARED-MEMORY MULTIPROCESSOR SYSTEM 有权
    在共享存储器多处理器系统中支持目标存储

    公开(公告)号:US20140089591A1

    公开(公告)日:2014-03-27

    申请号:US13625700

    申请日:2012-09-24

    CPC classification number: G06F9/50 G06F9/5066 G06F9/544 G06F12/0888

    Abstract: The present embodiments provide a system for supporting targeted stores in a shared-memory multiprocessor. A targeted store enables a first processor to push a cache line to be stored in a cache memory of a second processor in the shared-memory multiprocessor. This eliminates the need for multiple cache-coherence operations to transfer the cache line from the first processor to the second processor. The system includes an interface, such as an application programming interface (API), and a system call interface or an instruction-set architecture (ISA) that provides access to a number of mechanisms for supporting targeted stores. These mechanisms include a thread-location mechanism that determines a location near where a thread is executing in the shared-memory multiprocessor, and a targeted-store mechanism that targets a store to a location (e.g., cache memory) in the shared-memory multiprocessor.

    Abstract translation: 本实施例提供一种用于在共享存储器多处理器中支持目标存储的系统。 目标商店使得第一处理器能够将存储在共享存储器多处理器中的第二处理器的高速缓冲存储器中的高速缓存行推送。 这消除了对多个高速缓存相干操作的需要,以将高速缓存行从第一处理器传送到第二处理器。 该系统包括诸如应用编程接口(API)的接口以及提供对用于支持目标商店的多种机制的访问的系统调用接口或指令集架构(ISA)。 这些机制包括一个线程定位机制,它确定线程在共享存储器多处理器中执行的位置附近的位置,以及将存储器定位到共享存储器多处理器中的位置(例如高速缓冲存储器)的目标存储机制 。

    Sharded Permissioned Distrbuted Ledgers

    公开(公告)号:US20230089896A1

    公开(公告)日:2023-03-23

    申请号:US18058616

    申请日:2022-11-23

    Abstract: A sharded, permissioned, distributed ledger may reduce the amount of work and communication required by each participant, thus possibly avoiding scalability bottlenecks that may be inherent in previous distributed ledger implementations and possibly enabling the use of additional resources to translate to increased throughput. A sharded, permissioned, distributed ledger may be made up of multiple shards, each of which may also be a distributed ledger and which may operate in parallel. Participation within a sharded, permissioned, distributed ledger may be allowed only with permission of an authority. A sharded, permissioned, distributed ledger may include a plurality of nodes, each including a dispatcher configured to receive transaction requests from clients and to forward received requests to verifiers configured to append transactions to individual ones of the shards.

    Systems and methods for safely subscribing to locks using hardware extensions

    公开(公告)号:US10521277B2

    公开(公告)日:2019-12-31

    申请号:US14736123

    申请日:2015-06-10

    Abstract: Transactional Lock Elision allows hardware transactions to execute unmodified critical sections protected by the same lock concurrently, by subscribing to the lock and verifying that it is available before committing the transaction. A “lazy subscription” optimization, which delays lock subscription, can potentially cause behavior that cannot occur when the critical sections are executed under the lock. Hardware extensions may provide mechanisms to ensure that lazy subscriptions are safe (e.g., that they result in correct behavior). Prior to executing a critical section transactionally, its lock and subscription code may be identified (e.g., by writing their locations to special registers). Prior to committing the transaction, the thread executing the critical section may verify that the correct lock was correctly subscribed to. If not, or if locations identified by the special registers have been modified, the transaction may be aborted. Nested critical sections associated with different lock types may invoke different subscription code.

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