公开(公告)号：US07893360B2

公开(公告)日：2011-02-22

申请号：US11747972

申请日：2007-05-14

Applicant: Hajime Sakamoto ,  Dongdong Wang

Inventor： Hajime Sakamoto ,  Dongdong Wang

IPC: H05K1/16

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract translation: 过渡层38设置在IC芯片20的芯片焊盘22上并集成到多层印刷电路板10中。由此，可以将IC芯片20电连接到多层印刷电路板10而不使用引线 构件和密封树脂。 此外，通过在铝焊盘24上设置由铜制成的过渡层38，可以防止焊盘24上的树脂残留物并改善管芯焊盘24和通孔60之间的连接特性，并且可靠性。

公开(公告)号：US07884286B2

公开(公告)日：2011-02-08

申请号：US12034586

申请日：2008-02-20

Applicant: Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H05K1/16

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.

公开(公告)号：US20110024164A1

公开(公告)日：2011-02-03

申请号：US12887197

申请日：2010-09-21

Applicant: Motoo ASAI ,  Dongdong WANG ,  Takahiro MORI

Inventor： Motoo ASAI ,  Dongdong WANG ,  Takahiro MORI

IPC: H05K1/03

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A multi-layer printed circuit board including a core structure comprising resin layers and conductor circuits sandwiched by the resin layers, the core structure having a first surface and a second surface on an opposite side of the first surface, a first conductor layer including conductor circuits formed on the first surface of the core structure, and a second conductor layer including conductor circuits formed on the second surface of the core structure. The core structure includes a first via hole and a second via hole, and the first via hole and the second via hole include a metal filling up to the respective top of openings formed in the resin layers, respectively, sandwich one or more conductor circuits in the core structure and are positioned vertically to form a through hole electrically connecting respective ones of the conductor circuits of the first and the second conductor layers.

Abstract translation: 一种多层印刷电路板，包括由树脂层和由树脂层夹持的导体电路的芯结构，芯结构具有在第一表面的相对侧上的第一表面和第二表面，第一导体层包括导体电路 形成在芯结构的第一表面上，以及第二导体层，包括形成在芯结构的第二表面上的导体电路。 芯结构包括第一通孔和第二通孔，并且第一通孔和第二通孔分别包括填充到树脂层中形成的开口的相应顶部的金属，将一个或多个导体电路夹在 芯结构并且垂直定位以形成电连接第一和第二导体层的各个导体电路的通孔。

公开(公告)号：US07855894B2

公开(公告)日：2010-12-21

申请号：US11928397

申请日：2007-10-30

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/18

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract translation: 片状电容器20设置在印刷电路板10中。以这种方式，IC芯片90和每个片状电容器20之间的距离缩短，并且环路电感减小。 此外，芯片电容器20被容纳在具有大厚​​度的芯基板30中。 因此，印刷电路板的厚度不会变大。

公开(公告)号：US07855342B2

公开(公告)日：2010-12-21

申请号：US10380631

申请日：2001-04-25

Applicant: Hajime Sakamoto ,  Dongdong Wang

Inventor： Hajime Sakamoto ,  Dongdong Wang

IPC: H05K1/16

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract translation: 过渡层38设置在IC芯片20的芯片焊盘22上并集成到多层印刷电路板10中。由此，可以将IC芯片20电连接到多层印刷电路板10而不使用引线 构件和密封树脂。 此外，通过在铝焊盘24上设置由铜制成的过渡层38，可以防止焊盘24上的树脂残留物并改善管芯焊盘24和通孔60之间的连接特性，并且可靠性。

公开(公告)号：US20100226108A1

公开(公告)日：2010-09-09

申请号：US12784634

申请日：2010-05-21

Applicant: Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/42

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A printed circuit board including a core substrate including a first resin substrate, a second resin substrate having an opening and a third resin substrate in a multilayer manner while interposing bonding plates, insulating layers and conductive circuit layers alternately laminated on the core substrate, solder bumps formed on an outer surface of the printed circuit board, a first capacitor formed in the opening of the second resin substrate, a conductive pad formed on the first resin substrate and connected to an electrode of the first capacitor, a via hole formed in the first resin substrate and directly connected to the conductive pad and a conductive circuit on the core substrate, and a second capacitor mounted on a surface of the printed circuit board.

Abstract translation: 一种印刷电路板，包括具有第一树脂基板的芯基板，具有开口的第二树脂基板和第三树脂基板，同时插入在芯基板上交替层叠的接合板，绝缘层和导电电路层，焊料凸块 形成在所述印刷电路板的外表面上的第一电容器，形成在所述第二树脂基板的开口中的第一电容器，形成在所述第一树脂基板上并连接到所述第一电容器的电极的导电焊盘， 树脂基板，并且直接连接到导电焊盘和芯基板上的导电电路，以及安装在印刷电路板的表面上的第二电容器。

公开(公告)号：US20100163288A1

公开(公告)日：2010-07-01

申请号：US12685190

申请日：2010-01-11

Applicant: Hui Zhong ,  Kenichi Shimada ,  Yukihiko Toyoda ,  Motoo Asai ,  Dongdong Wang ,  Koji Sekine ,  Yoshitaka Ono

Inventor： Hui Zhong ,  Kenichi Shimada ,  Yukihiko Toyoda ,  Motoo Asai ,  Dongdong Wang ,  Koji Sekine ,  Yoshitaka Ono

IPC: H05K1/03

CPC classification number: H05K3/285 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/4602

Abstract: The present invention is to provide a multilayered printed circuit board free from cracks attributed to thermal expansion difference between a solder resist layer and another part and a multilayered printed circuit board of the present invention comprises a conductor circuit and a resin insulating layer serially formed on a substrate in an alternate fashion and in repetition and a solder resist layer formed as an outermost layer, and the solder resist layer contains an inorganic filler.

Abstract translation: 本发明是提供一种不存在由于阻焊层与另一部分之间的热膨胀差异而引起的裂纹的多层印刷电路板和本发明的多层印刷电路板，其特征在于，包括：导体电路和串联形成在所述多层印刷电路板上的树脂绝缘层 基板以重复的方式和形成为最外层的阻焊层，并且阻焊层包含无机填料。

公开(公告)号：US20100140803A1

公开(公告)日：2010-06-10

申请号：US12698622

申请日：2010-02-02

Applicant: Hajime SAKAMOTO ,  Dongdong WANG

Inventor： Hajime SAKAMOTO ,  Dongdong WANG

IPC: H01L23/48 ,  H01L21/78

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: A method of manufacturing a semiconductor device having a transition layer, including (a) forming a wiring and a die pad on a wafer, (b) forming a thin film layer on an entire surface of the wafer obtained in the step (a), (c) forming a resist layer on the thin film layer, and forming a thickening layer on a resist layer unformed section, (d) peeling the resist layer, (e) removing the thin film layer by etching, and (f) dividing the wafer to thereby form semiconductor devices.

Abstract translation: 一种制造具有过渡层的半导体器件的方法，包括（a）在晶片上形成布线和管芯焊盘，（b）在步骤（a）中获得的晶片的整个表面上形成薄膜层， （c）在薄膜层上形成抗蚀剂层，在抗蚀剂层未成形部分上形成增厚层，（d）剥离抗蚀剂层，（e）通过蚀刻去除薄膜层;（f） 从而形成半导体器件。

公开(公告)号：US20090188708A1

公开(公告)日：2009-07-30

申请号：US12409683

申请日：2009-03-24

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/00 ,  B44C1/22 ,  B32B37/02

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A method of manufacturing a multilayer printed circuit board including preparing a substrate board having a conductor circuit formed over the substrate board, forming an interlayer resin insulating layer on the conductor circuit formed over the substrate board by press laminating on the conductor circuit a film comprising a cycloolefin resin under vacuum or reduced pressure, and forming a via hole connecting to the conductor circuit through the resin insulating layer, the forming of the via hole including plating the via hole to fill up.

Abstract translation: 一种多层印刷电路板的制造方法，其特征在于，包括：准备在所述基板上形成有导体电路的基板，在所述导体电路上形成在所述导体电路上形成的层间树脂绝缘层， 在真空或减压下形成环烯烃树脂，并且通过树脂绝缘层形成连接到导体电路的通孔，形成通孔，其中电镀通孔以填满。

公开(公告)号：US20090183904A1

公开(公告)日：2009-07-23

申请号：US12409670

申请日：2009-03-24

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/00

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A multilayer printed circuit board including a substrate board and a built-up structure formed over the substrate board. The built-up structure includes conductor circuits and resin insulating layers. The built-up structure has via holes interconnecting the conductor circuits through one or more resin insulating layers. The via holes are filled up with plating, and the resin insulating layers is formed of a cycloolefin resin.

Abstract translation: 一种多层印刷电路板，包括形成在基板上的基板和叠层结构。 组合结构包括导体电路和树脂绝缘层。 积层结构具有通过一个或多个树脂绝缘层将导体电路互连的通孔。 通孔填充有电镀，树脂绝缘层由环烯烃树脂形成。