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公开(公告)号:US12267957B2
公开(公告)日:2025-04-01
申请号:US17127829
申请日:2020-12-18
Applicant: Intel Corporation
Inventor: Xiang Li , George Vergis , Jeffrey Krieger
Abstract: Connectors with a hybrid pitch are described. In one example, a connector to couple a card or module to a motherboard includes connector housing and a plurality of pins. The plurality of pins include alternating signal and ground pins. Each of the plurality of pins includes a card or module-facing end to couple with the card or module and a lead to couple with a through hole in the motherboard. A first pitch between leads of a pin and a first adjacent pin is different than a second pitch between leads of the pin and a second adjacent pin.
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公开(公告)号:US12237620B2
公开(公告)日:2025-02-25
申请号:US17214397
申请日:2021-03-26
Applicant: Intel Corporation
Inventor: Xiang Li , George Vergis
IPC: H01R13/6471 , H01R12/73 , H01R12/57 , H01R13/03
Abstract: Examples described herein relate to a pin arrangement that includes a first signal pin; a second signal pin; and multiple parallel ground pins positioned between the first and second signal pins. In some examples, the multiple parallel ground pins are coupled to a single pin connector coupled to a first device and a single pin connector coupled to a second device. In some examples, a first leg of the multiple parallel ground pins is positioned parallel to a portion of the first signal pin and wherein a second leg of the multiple parallel ground pins is positioned parallel to a portion of the second signal pin. In some examples, the multiple parallel ground pins provide a 1:N signal to ground ratio for signals transmitted through at least a portion of the first and second signal pins, where N is greater than 1.
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公开(公告)号:US11587597B2
公开(公告)日:2023-02-21
申请号:US16911168
申请日:2020-06-24
Applicant: Intel Corporation
Inventor: Xiang Li , Phil Geng , George Vergis , Mani Prakash
Abstract: A connector includes mounting tabs that are extended relative to traditional mounting tabs. On a back side of the printed circuit board (PCB), the mounting tabs connect to a back plate. The mounting tabs extend through the PCB and connect with the back plate, which provides improved structural integrity. Depending on the connector, the use of the mounting tabs can use existing mounting holes for the connector and remove the need for additional mounting holes.
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公开(公告)号:US20220353991A1
公开(公告)日:2022-11-03
申请号:US17866775
申请日:2022-07-18
Applicant: Intel Corporation
Inventor: Xiang Li , Konika Ganguly , George Vergis , Stephen Christianson , Xiaopeng Dong
Abstract: An example of an apparatus may comprise a first set of compression contact pads formed on a first side of a circuit board, a second set of compression contact pads formed on a second side of the circuit board opposite to the first side of the circuit board, where the first set of compression contact pads are respectively electrically connected to the second set of compression pads. An example of the circuit board may include a memory board. An example stackable memory module may include memory devices mounted to both sides of the memory board. Other examples are disclosed and claimed.
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公开(公告)号:US20220336989A1
公开(公告)日:2022-10-20
申请号:US17853901
申请日:2022-06-29
Applicant: Intel Corporation
Inventor: Xiang Li
Abstract: Methods and apparatus relating to a high density cable structure and wire termination are described. In one embodiment, a plug structure includes a paddle card to couple two wires to two gold fingers and a first add-on plug to couple a first wire to a first gold finger. The paddle card and the first add-on plug are to be stacked to form a single plug structure having a first row of gold fingers and a second row of gold fingers. Other embodiments are also claimed and disclosed.
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公开(公告)号:US20220217846A1
公开(公告)日:2022-07-07
申请号:US17700972
申请日:2022-03-22
Applicant: Intel Corporation
Inventor: Xiang Li , Konika Ganguly , George Vergis , Stephen Christianson , Xiaopeng Dong , Landon Hanks
Abstract: An embodiment of an electronic apparatus comprises a circuit board, one or more memory devices affixed to a top side of the circuit board, and one or more board-to-board connectors affixed to a bottom side of the circuit board to provide an external connection to signals of the one or more memory devices, where the one or more board-to-board connectors are located inward from outermost edges of the circuit board and where a first footprint defined by an outermost boundary of the one or more board-to-board connectors is substantially a same size as or smaller than a second footprint defined by an outermost boundary of the one or more memory devices. Other embodiments are disclosed and claimed.
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57.
公开(公告)号:US11228126B2
公开(公告)日:2022-01-18
申请号:US16739006
申请日:2020-01-09
Applicant: Intel Corporation
Inventor: Guixiang Tan , Xiang Li , Casey Winkel
Abstract: Embodiments are directed towards apparatuses, methods, and systems for a connector having a housing body to couple a dual in-line memory module (DIMM) to a printed circuit board (PCB). In embodiments, the housing body includes first and second opposing ends of the connector and a first and a second latch coupled at the respective first and second opposing ends of the connector to engage the DIMM. In embodiments, the first and the second opposing ends have respective first and second heights relative to a height of the housing body to allow the DIMM to be inserted or removed at an angle when disengaged from the first and second latch. In embodiments, one or more of the latches are removably coupled to the connector and/or can be rotated into a lay-flat position to allow the DIMM to be removed at an angle. Additional embodiments may be described and claimed.
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58.
公开(公告)号:US10938161B2
公开(公告)日:2021-03-02
申请号:US16370665
申请日:2019-03-29
Applicant: Intel Corporation
Inventor: Jaejin Lee , Jun Liao , Xiang Li , Christopher E. Cox
IPC: H01R13/6595 , H01R13/6581 , H05K9/00 , H05K1/11 , H01R12/72 , H01R13/6596 , H05K1/18
Abstract: A device includes a printed circuit board (PCB) and a shield for the PCB. The shield can reduce high frequency electromagnetic frequency (EMF) noise generated by one or more components of the PCB. The PCB includes pads to interface with a corresponding connector. For example, for a dual inline memory module (DIMM) PCB, the PCB includes pads to insert into a DIMM connector. The shield includes a gap in its perimeter that aligns with clips in the corresponding connector. The gaps will correspond to similar features of the PCB that interface with the corresponding connector to allow the shield to attach to the PCB. The shield includes lock fingers to extend from a connector-facing edge of the shield to interface with the corresponding connector to align the shield with the corresponding connector.
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公开(公告)号:US10888010B2
公开(公告)日:2021-01-05
申请号:US16422854
申请日:2019-05-24
Applicant: Intel Corporation
Inventor: Phil Geng , George Vergis , Xiang Li
Abstract: Embodiments are directed towards apparatuses, methods, and systems for a memory module, e.g., a dual in-line memory module (DIMM) including a first lengthwise edge along the DIMM and a second lengthwise edge, opposite the first lengthwise edge, to couple the DIMM with a printed circuit board (PCB). In embodiments, the DIMM includes one or more notches along the first lengthwise edge, to removeably couple with one or more flexible supports located at least partially along a length or width of a chassis and to engage the notches to assist in retention of the DIMM in the chassis to reduce a shock and/or vibration associated with a load of a plurality of DIMMs on the PCB. In some embodiments, the one or more flexible supports are coupled to a support structure, such as a pole mounted or otherwise coupled to a panel of the chassis. Additional embodiments may be described and claimed.
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60.
公开(公告)号:US10729002B2
公开(公告)日:2020-07-28
申请号:US16516174
申请日:2019-07-18
Applicant: Intel Corporation
Inventor: Jun Liao , Xiang Li , Yunhui Chu , Jong-Ru Guo , James McCall
Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.
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