公开(公告)号：US20080180880A1

公开(公告)日：2008-07-31

申请号：US12010622

申请日：2008-01-28

Applicant: Nobuyuki Okusawa

Inventor： Nobuyuki Okusawa

IPC: H01G9/07

CPC classification number: H01G4/33 ,  H01G4/224 ,  H01L27/016 ,  H01L28/40 ,  H03H2001/0014 ,  H05K1/0306 ,  H05K1/162 ,  H05K3/0023 ,  H05K3/388 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2203/0733 ,  Y10T29/435

Abstract: There is disclosed a thin film capacitor and the like capable of suppressing fluctuations of a capacity, increasing a VBD, and accordingly improving a device characteristic and reliability of a product. In electronic components 1 to 4, a capacitor 11 is formed on a flat substrate 51 as a base material including a planarization layer 52 formed on the surface thereof. The capacitor 11 has a structure in which a lower conductor 21 constituted of an underlayer conductor 21a and a conductor 21b, a dielectric film 31 made of alumina or the like, a resin layer J1 mainly formed of a novolak resin or the like, a resin layer J2 mainly formed of a polyimide resin or the like, and an upper conductor 25 constituted of an underlayer conductor 25a and a conductor 25b are formed on the planarization layer 52 of the substrate 51. The resin layer J1 has an opening K1 above the lower conductor 21, and the resin layer J2 is provided with an opening K2 opened more widely than the opening K1.

Abstract translation: 公开了能够抑制容量的波动，增加BDB的薄膜电容器等，从而提高产品的器件特性和可靠性。 在电子部件1〜4中，在作为基材的平坦基板51上形成电容器11，该基材包括在其表面上形成的平坦化层52。 电容器11具有下层导体21和导体21b构成的下部导体21，由氧化铝等构成的电介质膜31，主要由酚醛清漆树脂等构成的树脂层J 1 ，主要由聚酰亚胺树脂等形成的树脂层J 2和由下层导体25a和导体25b构成的上导体25形成在基板51的平坦化层52上。树脂层J 1 在下导体21上方具有开口K 1，并且树脂层J 2设置有比开口K 1更宽的开口K 2。

公开(公告)号：US07325294B2

公开(公告)日：2008-02-05

申请号：US10991900

申请日：2004-11-17

Applicant: Lin Zhou

Inventor： Lin Zhou

IPC: G11B5/187

CPC classification number: G11B5/187 ,  G11B5/484 ,  G11B5/4853 ,  G11B5/486 ,  H05K1/0221 ,  H05K1/056 ,  H05K3/0041 ,  H05K3/048 ,  H05K2201/0179 ,  H05K2201/09809 ,  H05K2203/0733 ,  Y10T29/49025 ,  Y10T29/49027 ,  Y10T29/49032 ,  Y10T29/49155 ,  Y10T29/49194

Abstract: A method of making electromagnetic wave shielded read and write wires is provided. The method includes forming a bottom insulation layer on a bottom shield layer formed on a substrate. Then, forming electrically conductive wire material into openings in a first forming layer to form first and second read wires and first and second write wires. Forming a top insulation layer on the bottom insulation layer and on the wires. Then, forming a second forming layer on the top insulation layer with first, second, third, fourth and fifth openings down to the top insulation layer. Ion milling portions of the top insulation layer exposed by the openings in the second forming layer down to the bottom shield layer, then removing the second forming layer. Then, forming nonmagnetic electrically conductive middle shield layers in the openings in electrical contact with the bottom shield layer and forming a top shield layer on top of the middle shield layer.

Abstract translation: 提供了制作电磁波屏蔽读写线的方法。 该方法包括在形成在基板上的底部屏蔽层上形成底部绝缘层。 然后，将导电线材形成在第一成形层中的开口中，以形成第一和第二读取线以及第一和第二写入线。 在底部绝缘层和导线上形成顶层绝缘层。 然后，在第一，第二，第三，第四和第五开口的顶部绝缘层上形成第二形成层，直到顶部绝缘层。 顶部绝缘层的离子铣削部分由第二成形层中的开口暴露于底部屏蔽层，然后移除第二成形层。 然后，在开口中形成与底部屏蔽层电接触的非磁性导电中间屏蔽层，并在中间屏蔽层的顶部上形成顶部屏蔽层。

公开(公告)号：US20070178412A1

公开(公告)日：2007-08-02

申请号：US11700864

申请日：2007-02-01

Applicant: Hyung Mi Jung ,  Yul Kyo Chung ,  Hyung Dong Kang

Inventor： Hyung Mi Jung ,  Yul Kyo Chung ,  Hyung Dong Kang

IPC: G03C5/00

CPC classification number: H05K1/162 ,  H05K3/16 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09763

Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.

Abstract translation: 在其中嵌入有薄膜电容器的印刷电路板的制造方法中，通过第一掩模溅射导电金属以形成下电极。 通过第二掩模溅射介电材料以形成电介质层。 通过第三掩模溅射导电金属以形成上电极。 绝缘层堆积在堆叠体上，上电极形成在其中，并且通孔从绝缘层的顶表面穿孔到下电极的顶表面，并从绝缘层的顶表面到 上电极形成在基板上。 此外，其中形成有通孔的堆叠体是电解和无电镀的。

公开(公告)号：US20070166520A1

公开(公告)日：2007-07-19

申请号：US10514876

申请日：2003-05-23

Applicant: Jurgen Leib ,  Dietrich Mund

Inventor： Jurgen Leib ,  Dietrich Mund

IPC: C03C3/089 ,  C03C3/091 ,  B32B3/00 ,  B32B17/06

CPC classification number: H01L21/02263 ,  C03B19/00 ,  C03C3/083 ,  C03C3/089 ,  C03C4/12 ,  C03C14/006 ,  C03C15/00 ,  C03C17/02 ,  C03C17/34 ,  C03C2214/16 ,  C03C2217/21 ,  C03C2218/15 ,  C03C2218/32 ,  C03C2218/328 ,  C03C2218/33 ,  C03C2218/355 ,  C23C14/10 ,  H01L21/02129 ,  H01L21/02161 ,  H01L21/31616 ,  H01L21/31625 ,  H01L21/50 ,  H01L21/56 ,  H01L23/10 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49894 ,  H01L23/66 ,  H01L24/97 ,  H01L51/5203 ,  H01L51/5246 ,  H01L51/5253 ,  H01L51/5259 ,  H01L51/5262 ,  H01L2223/6627 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01P3/003 ,  H01P11/003 ,  H05K3/28 ,  H05K3/467 ,  H05K2201/0179 ,  Y02P40/57 ,  Y10T428/24917 ,  H01L2924/00

Abstract: To improve the radio-frequency properties of radio-frequency substrates or radio-frequency conductor arrangements, the invention proposes a glass material for producing insulation layers for radio-frequency substrates or radio-frequency conductor arrangements, which, as an applied layer, in particular with a layer thickness in the range between 0.05 μm and 5 mm, has a loss factor tan δ of less than or equal to 70*10−4 in at least a frequency range above 1 GHz.

Abstract translation: 为了提高射频基板或射频导体配置的射频特性，本发明提出了一种用于制造射频基板绝缘层的玻璃材料或射频导体装置，特别是作为应用层 层厚度在0.05μm和5mm之间的范围内，在至少1GHz以上的频率范围内具有小于或等于70×10 -4 -4的损耗因子tanδ。

公开(公告)号：US20070158100A1

公开(公告)日：2007-07-12

申请号：US10638989

申请日：2003-08-11

Applicant: Robert Greenberg ,  Neil Talbot ,  Jerry Ok ,  Jordan Neysmith

Inventor： Robert Greenberg ,  Neil Talbot ,  Jerry Ok ,  Jordan Neysmith

IPC: H05K1/00 ,  H05K3/10

CPC classification number: A61B5/04001 ,  A61B2562/125 ,  A61N1/0529 ,  A61N1/0543 ,  A61N1/0551 ,  A61N1/0553 ,  C23C16/01 ,  C23C16/56 ,  H05K1/032 ,  H05K3/007 ,  H05K3/048 ,  H05K3/06 ,  H05K3/28 ,  H05K3/4676 ,  H05K2201/0179 ,  H05K2203/016 ,  H05K2203/0502 ,  H05K2203/176 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The invention is directed to an implant able insulated electrical circuit that utilizes polyparaxylylene, preferably as Parylene, a known polymer that has excellent living tissue implant characteristics, to provide for chronic implantation of conductive electrical devices, such as stimulators and sensors. The device is thin, flexible, electrically insulated, and stable after long exposure to living tissue. Layers of Parylene may be combined with layers of a polymer, such as polyimide, to yield greater design flexibility in the circuit. Multiple electrical conduction layers may be stacked in the circuit to increase packing density.

Abstract translation: 本发明涉及一种植入式绝缘电路，其利用聚对二甲苯，优选作为聚对二甲苯，已知具有优异活体组织植入特征的聚合物，以提供导电电气装置（例如刺激器和传感器）的慢性植入。 该设备在长时间暴露于生物体组织之后，薄，柔性，电绝缘和稳定。 聚对二甲苯层可以与诸如聚酰亚胺的聚合物层结合，以在电路中产生更大的设计灵活性。 多个导电层可以堆叠在电路中以增加堆积密度。

公开(公告)号：US07224571B2

公开(公告)日：2007-05-29

申请号：US11218357

申请日：2005-09-02

Applicant: Sriram Srinivasan ,  John S. Guzek ,  Cengiz A. Palanduz ,  Victor Prokofiev ,  Joel A. Auernheimer

Inventor： Sriram Srinivasan ,  John S. Guzek ,  Cengiz A. Palanduz ,  Victor Prokofiev ,  Joel A. Auernheimer

IPC: H01G4/228

CPC classification number: H05K1/162 ,  H01G4/10 ,  H01G4/1209 ,  H01G4/33 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09309 ,  Y10T29/43 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.

Abstract translation: 描述形成微电子结构的方法。 这些方法的实施例包括通过将第一电介质层附着到薄膜电容器的第二导电层并且将第二电介质层附接到薄膜电容器的第一导电层来形成衬底芯。

公开(公告)号：US20070085166A1

公开(公告)日：2007-04-19

申请号：US11582954

申请日：2006-10-19

Applicant: Jin Moon ,  Seung Lee ,  Hyung Jung ,  Yul Chung ,  Seung Sohn

Inventor： Jin Moon ,  Seung Lee ,  Hyung Jung ,  Yul Chung ,  Seung Sohn

IPC: H01L29/00

CPC classification number: H05K1/162 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0179

Abstract: The invention provides a PCB with a thin film capacitor embedded therein and a method for manufacturing the same. The PCB includes a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode via low temperature film formation; a buffer layer formed on the amorphous paraelectric film; a metal seed layer formed on the buffer layer; and an upper electrode formed on the metal seed layer.

Abstract translation: 本发明提供一种其中嵌有薄膜电容器的PCB及其制造方法。 PCB包括形成在绝缘基板上的下电极; 通过低温成膜形成在下电极上的非晶顺电膜; 形成在所述非晶正电介质膜上的缓冲层; 形成在缓冲层上的金属种子层; 以及形成在金属籽晶层上的上电极。

公开(公告)号：US20070081297A1

公开(公告)日：2007-04-12

申请号：US11541676

申请日：2006-10-03

Applicant: Min Ko ,  Yul Chung ,  Eun Park

Inventor： Min Ko ,  Yul Chung ,  Eun Park

IPC: H01G4/06

CPC classification number: H01G4/1218 ,  H01G4/1245 ,  H01G4/33 ,  H05K1/09 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2203/0353 ,  H05K2203/0369

Abstract: A method of manufacturing a thin film capacitor includes steps of: performing recrystallization heat treatment on a metal foil; forming a dielectric layer on a top surface of the recrystallized metal foil; heat treating the metal foil and the dielectric layer; and forming an upper electrode on a top surface of the heat-treated dielectric layer. The recrystallization heat treatment prevents the oxidation of a metal foil, by which a dielectric layer can be heat treated at a high temperature, thereby improving electric properties of a thin film capacitor and the reliability of a product.

Abstract translation: 制造薄膜电容器的方法包括以下步骤：对金属箔进行再结晶热处理; 在再结晶金属箔的顶表面上形成电介质层; 对金属箔和电介质层进行热处理; 以及在所述经热处理的介电层的顶表面上形成上电极。 再结晶热处理防止金属箔的氧化，通过该金属箔可以在高温下对介电层进行热处理，从而提高薄膜电容器的电性能和产品的可靠性。

公开(公告)号：US20070035930A1

公开(公告)日：2007-02-15

申请号：US11201771

申请日：2005-08-10

Applicant: Chien-Min Sung ,  Ming-Chi Kan ,  Shao Hu

Inventor： Chien-Min Sung ,  Ming-Chi Kan ,  Shao Hu

IPC: H05K7/20

CPC classification number: H05K1/0209 ,  H01L33/641 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0323

Abstract: Methods and devices for cooling printed circuit boards having at least one heat source are disclosed and described. The method can include coating a layer of diamond-like carbon (DLC) over at least a portion of the printed circuit board in order to accelerate movement of heat away from the heat source. Various heat sources may be present on a printed circuit board. In one aspect, the heat source can be an active heat source such as a heat-generating electronic component.

Abstract translation: 公开并描述了用于冷却具有至少一个热源的印刷电路板的方法和装置。 该方法可以包括在印刷电路板的至少一部分上涂覆类金刚石碳（DLC）层，以加速远离热源的热运动。 各种热源可能存在于印刷电路板上。 一方面，热源可以是诸如发热电子部件的活性热源。

公开(公告)号：US20070004165A1

公开(公告)日：2007-01-04

申请号：US11319820

申请日：2005-12-28

Applicant: Hyo Shin ,  Soon Yoon ,  Eun Park ,  Soo Lyoo

Inventor： Hyo Shin ,  Soon Yoon ,  Eun Park ,  Soo Lyoo

IPC: H01L21/20

CPC classification number: H05K1/162 ,  H01G4/10 ,  H05K2201/0175 ,  H05K2201/0179

Abstract: The present invention relates to a thin layer capacitor including first and second metal electrode layers and a dielectric layer of BiZnNb-based amorphous metal oxide having a dielectric constant of at least 15, interposed between the metal layers, and a layered structure having the same. The layered structure includes a first metal electrode layer formed on a polymer-based composite substrate, a dielectric layer, formed on the first metal electrode layer, and made of BiZnNb-based metal oxide with a dielectric constant of at least 15, and a second metal electrode layer formed on the dielectric layer. The BiZnNb-based amorphous metal oxide in this invention has a high dielectric constant without a thermal treatment for crystallization, useful for fabrication of a thin layer capacitor of a polymer-based layered structure such as a PCB.

Abstract translation: 本发明涉及包括第一和第二金属电极层的薄层电容器和插入在金属层之间介电常数至少为15的BiZnNb基非晶态金属氧化物的电介质层和具有该介电层的层状结构。 层状结构包括形成在第一金属电极层上的由聚合物系复合基板形成的第一金属电极层，介电层，介电常数为15以上的BiZnNb系金属氧化物，第二金属电极层 形成在电介质层上的金属电极层。 本发明中的BiZnNb系非晶态金属氧化物具有高介电常数，而不需要进行结晶热处理，可用于制造基于聚合物的层状结构如PCB的薄层电容器。