公开(公告)号：US07147141B2

公开(公告)日：2006-12-12

申请号：US10294516

申请日：2002-11-13

Applicant: Daryl Sato ,  Gary Paek ,  John Dungan ,  David W. Boggs

Inventor： Daryl Sato ,  Gary Paek ,  John Dungan ,  David W. Boggs

IPC: B23K31/02 ,  H05K3/34

CPC classification number: H01L23/49816 ,  B23K1/0016 ,  B23K2101/42 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/0094 ,  H05K2201/0215 ,  H05K2201/0959 ,  H05K2203/1105 ,  H05K2203/1194 ,  Y10T29/49144 ,  H01L2924/00

Abstract: A method for providing an improved solder joint for a via-in-pad ball grid array package. One or more bonding pads are formed upon a substrate. One or more vias are formed through the substrate within the bonding pad. The vias are plugged with a via plug material. The via plug material is then preconditioned such that an amount of volatiles within the via plug material is reduced.

Abstract translation: 一种用于提供焊盘通孔焊球阵列封装的改进的焊接接头的方法。 一个或多个接合焊盘形成在衬底上。 在焊盘内通过衬底形成一个或多个通孔。 通孔插入通孔塞材料。 然后对通孔塞材料进行预处理，使得通孔塞材料内的挥发物的量减少。

公开(公告)号：US20060154501A1

公开(公告)日：2006-07-13

申请号：US11324273

申请日：2006-01-04

Applicant: Rabindra Das ,  John Lauffer ,  Voya Markovich ,  Mark Poliks

Inventor： Rabindra Das ,  John Lauffer ,  Voya Markovich ,  Mark Poliks

IPC: H01R4/58

CPC classification number: H01G4/206 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/0023 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/0257 ,  H01L2224/0401

Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ferroelectric ceramic component, the ferroelectric ceramic component nano-particles having a particle size substantially in the range of between about 0.01 microns and about 0.9 microns and a surface within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical, assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.

Abstract translation: 用作电路化基板内的内部电容器的一部分的材料包括聚合物树脂和一定数量的纳米粉末，其包括至少一种金属组分和至少一种铁电陶瓷组分的混合物，所述铁电陶瓷组分纳米颗粒具有 基本上在约0.01微米至约0.9微米范围内的粒度和约2.0至约20平方米每克的表面。 还提供了适于在其中使用这种材料和电容器的电路化基板和制造这种基板的方法。 还提供电气，组件（基板和至少一个电气部件）和信息处理系统（例如，个人计算机）。

公开(公告)号：US20060154052A1

公开(公告)日：2006-07-13

申请号：US10561860

申请日：2004-06-29

Applicant: Eberhard Waffenschmidt ,  Eike Langkabel

Inventor： Eberhard Waffenschmidt ,  Eike Langkabel

IPC: B32B5/16 ,  B32B17/10

CPC classification number: H05K1/0373 ,  H01F1/26 ,  H01F1/37 ,  H01F17/0013 ,  H05K1/165 ,  H05K3/4626 ,  H05K2201/0215 ,  H05K2201/086 ,  H05K2203/061 ,  Y10T428/25 ,  Y10T428/256 ,  Y10T428/269

Abstract: The present invention relates to a soft magnetic material printed circuit boards. During the manufacturing of the printed magnetic circuit boards, the soft magnetic layer is used, such that it forms an integral part of the PCB after the manufacturing. In particular, the soft magnetic layers are formed such that, together with suitable circuit structures, an inductive component is formed. According to an aspect of the present invention, a polymer matrix of the soft magnetic layer is compatible to materials and/or processes used during the PCB manufacturing process.

Abstract translation: 本发明涉及一种软磁性材料印刷电路板。 在制造印刷磁路板期间，使用软磁性层，使得它在制造之后形成PCB的组成部分。 特别地，软磁性层形成为与合适的电路结构一起形成感应部件。 根据本发明的一个方面，软磁层的聚合物基质与在PCB制造过程中使用的材料和/或工艺相兼容。

公开(公告)号：US06986454B2

公开(公告)日：2006-01-17

申请号：US10616617

申请日：2003-07-10

Applicant: Morris D Stillabower

Inventor： Morris D Stillabower

IPC: B23K31/00 ,  B23K31/02 ,  B23K35/12

CPC classification number: H05K3/3484 ,  H01L2224/16225 ,  H05K3/3442 ,  H05K3/3463 ,  H05K2201/0215 ,  H05K2201/0254 ,  H05K2201/10727 ,  H05K2201/10992 ,  H05K2201/2036 ,  Y02P70/613

Abstract: An electronic package (10) is provided which includes a circuit board (12) having a substrate (14) and circuitry (16) and a surface mount device (22) having a contact terminal (24). A mounting pad (28) is formed on the circuit board (12). The electronic package (10) also includes a solder joint (30) connecting the contact terminal (24) of the surface mount device (22) to the mounting pad (28) on the circuit board (12). The solder joint (30) includes a reflowable solder and a plurality of stand-off members (32 or 42). The stand-off members (32 or 42) provide a separation distance (H) between the circuit board (12) and surface mount device (22) in the range of about 0.01 mm to 0.10 mm.

Abstract translation: 提供一种电子封装（10），其包括具有衬底（14）和电路（16）的电路板（12）和具有接触端子（24）的表面安装器件（22）。 在电路板（12）上形成安装垫（28）。 电子封装（10）还包括将表面安装器件（22）的接触端子（24）连接到电路板（12）上的安装焊盘（28）的焊接接头（30）。 焊接接头（30）包括可回流焊料和多个分离构件（32或42）。 分离构件（32或42）在电路板（12）和表面安装装置（22）之间提供在约0.01mm至0.10mm的范围内的间隔距离（H）。

公开(公告)号：US20050284918A1

公开(公告)日：2005-12-29

申请号：US10874843

申请日：2004-06-23

Applicant: Edward Martin ,  Tiffany Byrne ,  Carl Deppisch

Inventor： Edward Martin ,  Tiffany Byrne ,  Carl Deppisch

IPC: B23K31/02 ,  B23K35/02 ,  B23K35/26 ,  H05K3/34

CPC classification number: H01L24/81 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/26 ,  B23K35/264 ,  B23K2101/36 ,  H01L24/11 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/13311 ,  H01L2224/13347 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29311 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81825 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/157 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/0272 ,  H05K2203/043 ,  H01L2924/00012 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/13113 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: A composition includes a solder paste matrix and a solder mixture including a tin-based solder alloy. The composition also includes a discrete dispersion of a metal. The tin-based alloy includes a melting first temperature and the metal includes a melting second temperature. The melting second temperature is greater than the melting first temperature. The discrete dispersion is in a particle range of a majority passing minus 520-mesh. A process includes blending the solder mixture and the metal under non-alloying conditions to achieve the discrete dispersion of the metal. A process includes reflowing the composition such that the composition when solidified, has a melting point that is higher than the solder mixture in the composition.

Abstract translation: 组合物包括焊膏基质和包含锡基焊料合金的焊料混合物。 该组合物还包括金属的离散分散体。 锡基合金包括熔融第一温度，并且金属包括熔融第二温度。 熔化的第二温度大于熔融第一温度。 离散的分散体在多数通过负520目的粒子范围内。 一种方法包括在非合金化条件下混合焊料混合物和金属以实现金属的离散分散。 一种方法包括回流组合物，使得组合物在固化时具有高于组合物中焊料混合物的熔点。

公开(公告)号：US20050258509A1

公开(公告)日：2005-11-24

申请号：US11132062

申请日：2005-05-18

Applicant: Yasuyoshi Horikawa ,  Noriyoshi Shimizu

Inventor： Yasuyoshi Horikawa ,  Noriyoshi Shimizu

IPC: H05K1/16 ,  H01F17/00 ,  H01F17/04 ,  H01F41/04 ,  H01L21/56 ,  H01L23/12 ,  H01L23/498 ,  H01L25/16 ,  H01L29/00 ,  H05K3/28 ,  H05K3/46

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/645 ,  H01L25/16 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/165 ,  H05K3/28 ,  H05K3/4602 ,  H05K2201/0215 ,  H05K2201/086 ,  H05K2201/0989 ,  H05K2203/135

Abstract: A substrate is disclosed that includes an inductor that is realized by first wiring, and resin including high magnetic permeability filler material that covers the first wiring.

Abstract translation: 公开了一种基板，其包括通过第一布线实现的电感器和包括覆盖第一布线的高磁导率填充材料的树脂。

公开(公告)号：US20050093164A1

公开(公告)日：2005-05-05

申请号：US10970165

申请日：2004-10-21

Applicant: Martin Standing

Inventor： Martin Standing

IPC: H01B1/02 ,  H01L20060101 ,  H01L23/48 ,  H01L23/532 ,  H01R12/04 ,  H05K3/34

CPC classification number: H01B1/02 ,  H01L2224/73153 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/13055 ,  H01L2924/13091 ,  H05K3/3484 ,  H05K2201/0215 ,  H01L2924/00

Abstract: A paste for forming an interconnect includes a mixture of binder particles, filler particles and flux material, binder particles having a melting temperature that is lower than that of the filler particles, and the proportion of the binder particles and the filler particles being selected such when heat is applied to melt the binder particles the shape of the paste as deposited is substantially retained thereby allowing for the paste to be used for forming interconnect structures.

Abstract translation: 用于形成互连的糊料包括粘合剂颗粒，填料颗粒和助焊剂材料的混合物，熔融温度低于填料颗粒的熔融温度的粘合剂颗粒，以及当选择粘合剂颗粒和填料颗粒的比例时， 施加热量以熔化粘合剂颗粒，沉积的糊料的形状基本保持，从而允许将糊料用于形成互连结构。

公开(公告)号：US06887779B2

公开(公告)日：2005-05-03

申请号：US10719495

申请日：2003-11-21

Applicant: David J. Alcoe ,  Francis J. Downes, Jr. ,  Gerald W. Jones ,  John S. Kresge ,  Cheryl L. Tytran-Palomaki

Inventor： David J. Alcoe ,  Francis J. Downes, Jr. ,  Gerald W. Jones ,  John S. Kresge ,  Cheryl L. Tytran-Palomaki

IPC: H01L23/498 ,  H05K3/46 ,  H01L21/4763

CPC classification number: H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K3/4602 ,  H05K3/4641 ,  H05K2201/0215 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H01L2924/00

Abstract: A semiconductor chip carrier having an increased chip connector and plated through hole density. In particular, a substrate having a plurality of plated through holes therein, and a fatigue resistant redistribution layer thereon. The redistribution layer includes a plurality of vias selectively positioned over and contacting the plated through holes. The substrate further including a ground plane, two pair of signal planes, and two pair of power planes, wherein the second pair of power planes are located directly underneath the external dielectric layer. A buried plated through hole within the substrate.

Abstract translation: 一种具有增加的芯片连接器和电镀通孔密度的半导体芯片载体。 特别地，其中具有多个电镀通孔的基板和其上的抗疲劳再分布层。 再分配层包括选择性地定位在电镀通孔上并接触电镀通孔的多个通孔。 所述基板还包括接地平面，两对信号面和两对电源层，其中所述第二对电源层位于所述外部电介质层的正下方。 衬底内埋入电镀通孔。

公开(公告)号：US20040265551A1

公开(公告)日：2004-12-30

申请号：US10829299

申请日：2004-04-22

Applicant: TDK CORPORATION

Inventor： Minoru Takaya ,  Toshikazu Endo

IPC: B32B003/00 ,  B44C001/165 ,  D04H001/00 ,  B32B027/04 ,  D04H003/00 ,  B32B027/12 ,  D04H013/00 ,  B32B015/00 ,  D04H005/00

CPC classification number: B32B15/04 ,  B32B15/08 ,  B32B27/00 ,  B32B37/10 ,  B32B2255/06 ,  B32B2255/26 ,  B32B2457/00 ,  H01F17/0013 ,  H01L23/49822 ,  H01L2924/0002 ,  H05K1/0366 ,  H05K1/0373 ,  H05K1/162 ,  H05K1/165 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/0358 ,  H05K2201/086 ,  H05K2201/09672 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T442/674 ,  H01L2924/00

Abstract: A resinous material, or a composite material obtained by mixing a resin and a powdery functional material is formed into a thin sheet to make a core substrate 1. A patterned thin-film conductor 2 is formed by thin-film forming technology on at least either of the front and rear surfaces of the core substrate 1. Clothless layers 3a to 3d are super-posed on at least that surface of the core substrate 1 on which the thin-film conductor 2 has been formed. Each clothless layer is formed from a resin-coated metal foil obtained by coating one surface of a metal foil with a resinous material, or a composite material obtained by mixing a resin and a powdery functional material. Conductor layers 4a to 4d obtained by patterning the metal foils are formed on the clothless layers 3a to 3d.

Abstract translation: 将树脂材料或通过混合树脂和粉末状功能材料得到的复合材料形成为薄片以制成芯基板1.通过薄膜形成技术在至少两者之间形成图案化的薄膜导体2 芯片基板1的前表面和后表面的至少一个表面上的至少一个表面，至少形成有薄膜导体2的芯基板1的表面。 每个无布层由通过用树脂材料涂覆金属箔的一个表面获得的树脂涂覆的金属箔或通过混合树脂和粉末状功能材料获得的复合材料形成。 通过图案化金属箔获得的导体层4a至4d形成在无布层3a至3d上。

公开(公告)号：US20040232550A1

公开(公告)日：2004-11-25

申请号：US10443277

申请日：2003-05-22

Applicant: RF Micro Devices, Inc.

Inventor： Jeffrey Scott Walker ,  Joseph Byron Bullis

IPC: H01L023/02

CPC classification number: H05K3/321 ,  H01L24/29 ,  H01L24/32 ,  H01L2924/01029 ,  H05K3/305 ,  H05K3/3442 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/10636 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

Abstract: The present invention relates to electrically attaching a surface mount device to a mounting structure via their respective contact pads using an attach material, such as solder or conductive epoxy, which includes a filler material. In general, the filler material is relatively solid and granular shaped, wherein the diameter of the filler material controls a mounting distance between the surface mount device and the mounting structure. The filler allows a desired distance to be maintained during initial placement of the surface mount device and any subsequent reheating.

Abstract translation: 本发明涉及使用包括填充材料的附着材料（例如焊料或导电环氧树脂），通过它们各自的接触垫将表面安装器件电连接到安装结构。 通常，填充材料相对固体和颗粒状，其中填充材料的直径控制表面安装装置和安装结构之间的安装距离。 填充物允许在表面安装装置的初始放置期间和随后的再加热期间保持期望的距离。