公开(公告)号：US20150188832A1

公开(公告)日：2015-07-02

申请号：US14635708

申请日：2015-03-02

Applicant: Silicon Graphics International Corp.

Inventor： Randal G. Martin ,  Steven C. Miller ,  Mark D. Stadler ,  David A. Kruckemyer

IPC: H04L12/801 ,  H04L12/825

CPC classification number: H04L47/34 ,  H04L45/24 ,  H04L47/10 ,  H04L47/26 ,  H04L47/266 ,  H04L47/39 ,  H04L47/41

Abstract: A multiple channel data transfer system (10) includes a source (12) that generates data packets with sequence numbers for transfer over multiple request channels (14). Data packets are transferred over the multiple request channels (14) through a network (16) to a destination (18). The destination (18) re-orders the data packets received over the multiple request channels (14) into a proper sequence in response to the sequence numbers to facilitate data processing. The destination (18) provides appropriate reply packets to the source (12) over multiple response channels (20) to control the flow of data packets from the source (12).

Abstract translation: 多通道数据传输系统（10）包括一个源（12），其生成具有用于在多个请求信道（14）上传送的序列号的数据分组。 数据分组通过多个请求信道（14）通过网络（16）传送到目的地（18）。 目的地（18）响应于序列号，将通过多个请求信道（14）接收的数据分组重新排序成适当的序列，以便于数据处理。 目的地（18）通过多个响应信道（20）向源（12）提供适当的应答分组，以控制来自源（12）的数据分组的流。

公开(公告)号：US20140297923A1

公开(公告)日：2014-10-02

申请号：US13931870

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Steven Dean ,  David R. Collins ,  Paul Kinyon

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有包括用于执行计算的处理器的第一区域的计算刀片和包括用于执行计算的非易失性存储器的第二区域和用于执行数据移动和存储的另一个计算处理器。 由于数据移动和存储被卸载到次要处理器，所以用于执行计算的处理器不被中断以执行这些任务。 在HPC系统中使用的方法接收计算处理器中的指令和存储器中的第一数据。 该方法包括：在不间断地继续执行计算处理器中的指令的同时，将第二数据接收到存储器中。 还公开了一种实现该方法的计算机程序产品。

公开(公告)号：US20140282584A1

公开(公告)日：2014-09-18

申请号：US13900757

申请日：2013-05-23

Applicant: Silicon Graphics International Corp.

Inventor： Karl Allan Feind

IPC: G06F9/50

CPC classification number: G06F9/5027

Abstract: A method of distributing threads among accelerators in a high performance computing system receives a request to assign an accelerator in the computing system to a thread. The request includes a mode indicative of location and exclusivity of the accelerator for use by the thread. The method selects the accelerator according to a processor assigned to the thread. The method also assigns the accelerator to the thread with the exclusivity specified in the request.

Abstract translation: 在高性能计算系统中的加速器之间分配线程的方法接收将计算系统中的加速器分配给线程的请求。 该请求包括指示由线程使用的加速器的位置和排他性的模式。 该方法根据分配给线程的处理器选择加速器。 该方法还将加速器分配给请求中指定的排他性的线程。

公开(公告)号：US20140281656A1

公开(公告)日：2014-09-18

申请号：US13798604

申请日：2013-03-13

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Rodney A. Ruesch ,  Eric C. Fromm ,  Robert W. Cutler ,  Richard G. Finstad ,  Dale R. Purdy ,  Brian J. Johnson ,  John F. Steiner

IPC: G06F1/08

CPC classification number: G06F1/08 ,  G06F1/10 ,  G06F1/12 ,  H04J3/0638 ,  H04J3/0661

Abstract: Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.

Abstract translation: 为HPC系统中的每个处理器生成处理器时钟信号，使得所有处理器时钟信号具有相同的频率。 此外，作为启动（启动）过程的一部分，进程设置处理器的所有时间戳计数器（TSC），这样它们表示相同的时间。 HPC系统的每个刀片从同步通信网络恢复恢复的时钟信号，刀片耦合到同步通信网络。 刀片从恢复的时钟信号产生处理器时钟，并将处理器时钟提供给刀片上的处理器。 每个机箱耦合到第二个系统级的同步通信网络，每个机箱将其机箱同步通信网络与全系统的同步通信系统同步。 因此，所有处理器时钟信号都以相同的频率生成。

公开(公告)号：US20140281606A1

公开(公告)日：2014-09-18

申请号：US13838443

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： Lance MacKimmie Evans ,  Gera Kazakov

IPC: G06F1/32 ,  G06F9/48

CPC classification number: G06F1/3268 ,  G06F1/3221 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0689 ,  G06F9/5094 ,  Y02D10/154 ,  Y02D10/22 ,  Y02D10/24

Abstract: A power consumption threshold is implemented to manage power consumed by a plurality of devices. A power consumption threshold may be selected for a data storage system having multiple drives. Policies may control operation of storage devices such as hard disk drives to ensure the power consumption threshold is not exceeded. The policies may implement procedures for scheduling hard disk drive operations based on disk drive power characteristics, scheduling maintenance tasks, managing device power states, and strategically scheduling device operations based on their current state. The policies may be implemented by a data manager application in communication with multiple tiers of a data storage system.

Abstract translation: 实现功耗阈值以管理由多个设备消耗的功率。 可以为具有多个驱动器的数据存储系统选择功耗阈值。 策略可以控制诸如硬盘驱动器之类的存储设备的操作，以确保不超过功耗阈值。 该策略可以实现基于磁盘驱动器功率特性来调度硬盘驱动器操作的程序，调度维护任务，管理设备电源状态，以及基于其当前状态来策略性地调度设备操作。 策略可以由与数据存储系统的多层通信的数据管理器应用来实现。

公开(公告)号：US20140281322A1

公开(公告)日：2014-09-18

申请号：US13831702

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： Charles Robert Martin

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/0647 ,  G06F3/0685

Abstract: Embodiments of the invention includes identifying the priority of data sets based on how frequently they are accessed by data center compute resources or by other measures assigning latency metrics to data storage resources accessible by the data center, moving data sets with the highest priority metrics to data storage resources with the fastest latency metrics, and moving data sets with lower priority metrics to slower data storage resources with slower latency metrics. The invention also may be compatible with or enable new forms of related applications and methods for managing the data center.

Abstract translation: 本发明的实施例包括基于数据中心计算资源访问的频率或通过将数据中心可访问的数据存储资源分配等待时间度量的其他措施来识别数据集的优先级，将具有最高优先权度量的数据集移动到数据 具有最快延迟度量的存储资源，以及具有较低优先级度量的数据集到具有较慢延迟度量的较慢数据存储资源。 本发明还可以与用于管理数据中心的相关应用和方法的新形式兼容或实现。

公开(公告)号：US20140281300A1

公开(公告)日：2014-09-18

申请号：US13831694

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： Charles Robert Martin

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0649 ,  G06F3/067 ,  G06F3/0685

Abstract: A system reduces the impact of constrained bandwidth to long-term data storage without adding new data storage resources to the data center, typically by temporarily storing data on data storage devices that are contained within a desktop computer, a notebook computer, or other computing device. The invention stores lower priority data sets temporarily on data storage devices that are already purchased or expensed until lower priority data sets can be migrated to long-term data storage. The invention relieves the performance impact of congestion caused by slow communication interfaces, recording channels, and mechanical systems that move tape cartridges around. The invention may also be configured with security functions that restrict where or how certain data sets are stored temporarily.

Abstract translation: 系统通常通过将数据临时存储在台式计算机，笔记本电脑或其他计算设备中的数据存储设备上，从而减少受限带宽对长期数据存储的影响，而不会向数据中心增加新的数据存储资源 。 本发明临时存储已经购买或消费的数据存储设备上的低优先级数据集，直到较低优先级数据集可以迁移到长期数据存储。 本发明缓解了慢通信接口，记录通道和移动磁带盒的机械系统所带来的拥塞的性能影响。 本发明还可以配置有限制临时存储某些数据集的位置或方式的安全功能。

公开(公告)号：US20140281214A1

公开(公告)日：2014-09-18

申请号：US13897215

申请日：2013-05-17

Applicant: Silicon Graphics International Corp.

Inventor： Kevan Flint Rehm ,  Benjamin Paul Myers

IPC: G06F3/06

CPC classification number: G06F3/0689 ,  G06F3/0617 ,  G06F3/0653 ,  G06F11/1448

Abstract: Quotas are tracked for user usage of hard disk drive space and offline backup storage space. The quota is enforced against the total space utilized by a user, not just high tier hard drive space usage. When data is migrated from hard disk drive space to backup storage space, data metadata is updated to reflect data kept offline for the user. As such, when users request to store new data, the data usage of hard disk space and backup storage space is determined from the metadata that reflects both data types, and the total storage spaced for the user is used to grant or reject the user's request to store more data in the system.

Abstract translation: 跟踪用户使用硬盘驱动器空间和脱机备份存储空间的配额。 配额是针对用户使用的总空间执行的，而不仅仅是高层硬盘空间的使用。 当数据从硬盘驱动器空间迁移到备份存储空间时，数据元数据将被更新，以反映用户不断离线的数据。 因此，当用户请求存储新数据时，从反映这两种数据类型的元数据确定硬盘空间和备份存储空间的数据使用，并且用于用户的总存储空间用于授予或拒绝用户的请求 在系统中存储更多的数据。

公开(公告)号：US20140281208A1

公开(公告)日：2014-09-18

申请号：US13802086

申请日：2013-03-13

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Eric C. Fromm

IPC: G06F17/30

CPC classification number: G06F16/90339 ,  G11C15/04

Abstract: An associative look-up instruction for an instruction set architecture (ISA) of a processor and methods for use of an associative look-up instruction. The associative look-up instruction of the ISA specifies one or more fields within a data unit that are used as a pattern of bits for identifying data content in a memory structure to be loaded into hardware registers or other storage components of the ISA. Specified parameters of the associative operation may be explicit within the instruction or indirectly pointed to via hardware registers or other storage components of the ISA. The memory structure may be content addressable memory (CAM).

Abstract translation: 用于处理器的指令集架构（ISA）的关联查找指令以及使用关联查找指令的方法。 ISA的关联查找指令指定数据单元内的一个或多个字段，其用作用于识别要加载到ISA的硬件寄存器或其他存储组件的存储器结构中的数据内容的位模式。 关联操作的指定参数可以在指令内显式，也可以通过ISA的硬件寄存器或其他存储组件间接指出。 存储器结构可以是内容可寻址存储器（CAM）。

公开(公告)号：US20140281105A1

公开(公告)日：2014-09-18

申请号：US13931793

申请日：2013-06-28

Applicant: Silicon Graphics International Corp.

Inventor： Jim Joseph Brewer ,  Jay Everett Nelson

IPC: G06F13/40

CPC classification number: H01R31/06

Abstract: Embodiments of the invention includes a plurality of connectors configured to connect a plurality of data storage host bus adaptors to a plurality of data storage device subassemblies such that at least one lane of low voltage differential signal pairs from each of the plurality of host bus adaptors is connected to each of the data storage device subassemblies. The invention improves the electrical interconnections in a data storage array such as a JBOD enclosure or data storage server. The invention minimizes the number of connectors by reducing the number of printed circuit boards, and eliminates the need to add signal repeaters to maintain signal quality. The invention also increases the cooling efficiency of the enclosure by increasing air flow by reducing the number of printed circuit boards in the data storage array.

Abstract translation: 本发明的实施例包括多个连接器，其被配置为将多个数据存储主机总线适配器连接到多个数据存储设备子组件，使得来自多个主机总线适配器中的每一个的至少一个低电压差分信号对的通道为 连接到每个数据存储设备子组件。 本发明改进了诸如JBOD机箱或数据存储服务器之类的数据存储阵列中的电互连。 本发明通过减少印刷电路板的数量来最小化连接器的数量，并且消除了添加信号中继器以维持信号质量的需要。 本发明还通过减少数据存储阵列中的印刷电路板的数量来增加空气流量来增加外壳的冷却效率。