公开(公告)号：US20140281656A1

公开(公告)日：2014-09-18

申请号：US13798604

申请日：2013-03-13

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Rodney A. Ruesch ,  Eric C. Fromm ,  Robert W. Cutler ,  Richard G. Finstad ,  Dale R. Purdy ,  Brian J. Johnson ,  John F. Steiner

IPC: G06F1/08

CPC classification number: G06F1/08 ,  G06F1/10 ,  G06F1/12 ,  H04J3/0638 ,  H04J3/0661

Abstract: Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.

Abstract translation: 为HPC系统中的每个处理器生成处理器时钟信号，使得所有处理器时钟信号具有相同的频率。 此外，作为启动（启动）过程的一部分，进程设置处理器的所有时间戳计数器（TSC），这样它们表示相同的时间。 HPC系统的每个刀片从同步通信网络恢复恢复的时钟信号，刀片耦合到同步通信网络。 刀片从恢复的时钟信号产生处理器时钟，并将处理器时钟提供给刀片上的处理器。 每个机箱耦合到第二个系统级的同步通信网络，每个机箱将其机箱同步通信网络与全系统的同步通信系统同步。 因此，所有处理器时钟信号都以相同的频率生成。

公开(公告)号：US20140281036A1

公开(公告)日：2014-09-18

申请号：US13828896

申请日：2013-03-14

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Robert W. Cutler ,  Dimitri George Sivanich

IPC: H04L29/08

CPC classification number: H04L67/1095 ,  G06F9/4825 ,  H04J3/0667

Abstract: A method, system and program code for synchronizing scheduler interrupts across multiple nodes of a cluster. Network timers and local scheduling timers are clocked off a system source clock. A processor in each computing node repeatedly reads a network time of day counter. The start of scheduler interrupts is synchronized when the time of day counter is at an integer multiple of a synchronizing integer number of network timer ticks. The processor sends an interprocessor scheduler interrupt to other processors in the node to synchronize scheduling timers in the computing node and throughout the cluster.

Abstract translation: 用于在群集的多个节点上同步调度程序中断的方法，系统和程序代码。 网络定时器和本地调度定时器从系统源时钟计时。 每个计算节点中的一个处理器重复读取一天的网络时间计数器。 当日间计数器的时间是同步整数个网络计时器滴答的整数倍时，调度程序中断的开始是同步的。 处理器向节点中的其他处理器发送处理器间调度器中断，以同步计算节点和整个集群中的调度计时器。

公开(公告)号：US09104343B2

公开(公告)日：2015-08-11

申请号：US13798604

申请日：2013-03-13

Applicant: Silicon Graphics International Corp.

Inventor： Rodney A. Ruesch ,  Eric C. Fromm ,  Robert W. Cutler ,  Richard G. Finstad ,  Dale R. Purdy ,  Brian J. Johnson ,  John F. Steiner

IPC: G06F1/08 ,  H04J3/06

CPC classification number: G06F1/08 ,  G06F1/10 ,  G06F1/12 ,  H04J3/0638 ,  H04J3/0661

Abstract: Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.

Abstract translation: 为HPC系统中的每个处理器生成处理器时钟信号，使得所有处理器时钟信号具有相同的频率。 此外，作为启动（启动）过程的一部分，进程设置处理器的所有时间戳计数器（TSC），这样它们表示相同的时间。 HPC系统的每个刀片从同步通信网络恢复恢复的时钟信号，刀片耦合到同步通信网络。 刀片从恢复的时钟信号产生处理器时钟，并将处理器时钟提供给刀片上的处理器。 每个机箱耦合到第二个系统级的同步通信网络，每个机箱将其机箱同步通信网络与全系统的同步通信系统同步。 因此，所有处理器时钟信号都以相同的频率生成。