公开(公告)号：US20020047632A1

公开(公告)日：2002-04-25

申请号：US09883990

申请日：2001-06-20

Inventor： Eiji Koyama

IPC: H05B037/02

CPC classification number: H04N5/3765 ,  H03M1/08 ,  H04N5/3577

Abstract: Even when variation in transistor characteristic, resistance or the like occurs during manufacturing, a noise component is always minimized. Each of k clock phase difference generating circuits 16-18 shifts a phase of a basic clock signal ADCK1 by a specified different value to obtain a clock signal ADCK2 and supplies the clock signal ADCK2 to an A/D converter. A k counter 19 successively selects the clock phase difference generating circuits 16-18 and stores a noise component in an output of the A/D converter measured by a noise measuring circuit 27 in a corresponding register. A comparator 25 compares k noise components and obtains the number j of the clock phase difference generating circuit giving a minimum value. A selection circuit 26 fixedly selects only the j-th clock phase difference generating circuit. Thus, even when variation in the transistor characteristics or resistance occurs in each device in a manufacturing stage, the clock signal ADCK2 obtained by shifting the phase of the basic clock signal ADCK1 can be supplied to the A/D converter so that a noise component is minimized for each device.

Abstract translation: 即使在制造时发生晶体管特性，电阻等的变化，噪声成分总是最小化。 k时钟相位差发生电路16-18中的每一个将基本时钟信号ADCK1的相位移位指定的不同值，以获得时钟信号ADCK2，并将时钟信号ADCK2提供给A / D转换器。 A k计数器19连续地选择时钟相位差产生电路16-18，并将噪声分量存储在由噪声测量电路27测量的A / D转换器的输出中的相应寄存器中。 比较器25比较k个噪声分量，并获得给出最小值的时钟相位差产生电路的数目j。 选择电路26仅固定地选择第j时钟相位差产生电路。 因此，即使在制造阶段的每个器件中出现晶体管特性或电阻的变化，也可以通过将基本时钟信号ADCK1的相位偏移而获得的时钟信号ADCK2供给到A / D转换器，使得噪声分量为 最小化每个设备。

公开(公告)号：US4868573A

公开(公告)日：1989-09-19

申请号：US119594

申请日：1987-11-12

Applicant: Charles M. Wittmer

Inventor： Charles M. Wittmer

IPC: G01J1/44 ,  G01J3/42 ,  H03M1/00

CPC classification number: G01J1/44 ,  H03M1/60 ,  G01J2001/4426 ,  G01J3/42 ,  H03M1/08

Abstract: The system includes a synchronous voltage-to-frequency converter connected to receive an analog input signal voltage and to generate a train of output pulses. A counter is connected to receive and count the output pulses and a digital register is connected to the counter for periodically receiving and storing the count in the counter. A conversion interval timer circuit is connected to control the operation of the counter and the register to determine a conversion interval during which the output pulses from the synchronous voltage-to-frequency converter are accumulated in the counter and then stored in the register. The conversion interval timer circuit is operable to determine the end of a prior conversion interval and the beginning of a new conversion interval in response to a predetermined phase of a predetermined cycle of the ac power line voltage. A timer is provided for exact measurement of the duration of each conversion interval and a multiplier is provided for multiplying the number stored in the register by a function which is a reciprocal of the exact duration measurement from the timer to thereby contact the number for variations in the conversion interval.

Abstract translation: 该系统包括连接以接收模拟输入信号电压并产生一系列输出脉冲的同步电压 - 频率转换器。 连接计数器以接收和计数输出脉冲，数字寄存器连接到计数器，以便周期性地接收和存储计数器中的计数。 连接转换间隔定时器电路以控制计数器和寄存器的操作，以确定来自同步电压 - 频率转换器的输出脉冲累积在计数器中然后存储在寄存器中的转换间隔。 转换间隔定时器电路可操作以响应于交流电源线电压的预定周期的预定相位确定先前转换间隔的结束和新的转换间隔的开始。 提供了一个定时器，用于精确测量每个转换间隔的持续时间，并且提供乘法器用于将寄存器中存储的数字乘以来自定时器的精确持续时间测量的倒数的函数，从而接触来自定时器的变化的数字 转换间隔。

公开(公告)号：US4812848A

公开(公告)日：1989-03-14

申请号：US92115

申请日：1987-09-02

Applicant: John J. Fry

Inventor： John J. Fry

IPC: H03M1/00 ,  H03M1/60

CPC classification number: H03M1/60 ,  H03M1/08 ,  H03M1/10 ,  H03M1/122

Abstract: A method and apparatus of converting analog voltage signals to digital frequency signals comprises a voltage to frequency converter having an output which produces pulse trains that are proportional to the voltage level of an analog voltage signal applied to the converter. A microprocessor is connected to the converter for sampling the pulse trains during a fixed sampling period. The microprocessor detects the leading edges of the first and last pulse in the pulse train, stores the occurrence time for the two leading edges and then subtracts the occurrence times to calculate the duration time for all the pulses in the sample period between the leading edges of the first and last pulses. A counter counts the number of pulses between the first and last pulse, and a calculation is made dividing the number of pulses by the time duration to yield an accurate measurement of the frequency for the pulse train. A precision reference voltage along with a plurality of analog voltage signals to be measured, is applied to the plural inputs of a multiplexer. The output of the multiplexer is then amplified and a level shifted before it is applied to the converter. The microprocessor drives the multiplexer to sequentially apply signals to the converter. During each complete cycle of the multiplexer the microprocessor receives a pulse train corresponding to the reference voltage signal. A stored frequency for that reference pulse train is then compared to the actual frequency which results from the reference voltage to determine whether any shifts in ambient conditions have caused shifts in the output of the converter. This shift is interpreted as being caused by changes in ambient condition and is applied equally to all other measured frequencies. In this way, inexpensive components can be used while still maintaining accuracy for a wide range of ambient conditions.

Abstract translation: 将模拟电压信号转换为数字频率信号的方法和装置包括具有输出的电压 - 频率转换器，该输出产生与施加到转换器的模拟电压信号的电压电平成比例的脉冲串。 微处理器连接到转换器，用于在固定采样周期内采样脉冲串。 微处理器检测脉冲序列中第一个和最后一个脉冲的前沿，存储两个前沿的出现时间，然后减去发生次数，以计算采样周期中所有脉冲的持续时间， 第一个和最后一个脉冲。 一个计数器对第一个和最后一个脉冲之间的脉冲数进行计数，并且计算是将脉冲数除以持续时间，以产生脉冲序列的频率的精确测量。 将精密参考电压连同要测量的多个模拟电压信号一起施加到多路复用器的多个输入端。 然后，多路复用器的输出被放大，并且在施加到转换器之前将电平移位。 微处理器驱动多路复用器以顺序地将信号施加到转换器。 在多路复用器的每个完整周期期间，微处理器接收对应于参考电压信号的脉冲串。 然后将该参考脉冲串的存储频率与由参考电压产生的实际频率进行比较，以确定环境条件中的任何移位是否引起了转换器输出的移位。 这种偏移被解释为由环境条件的变化引起的并且均等地应用于所有其它测量的频率。 以这种方式，可以使用便宜的组件，同时在宽范围的环境条件下仍然保持精度。

公开(公告)号：US4811018A

公开(公告)日：1989-03-07

申请号：US12574

申请日：1987-02-09

Applicant: Haruo Sakata

Inventor： Haruo Sakata

IPC: H03M1/12 ,  H03G3/30 ,  H03M1/00 ,  H03M1/18

CPC classification number: H03M1/08

Abstract: An analog-to-digital conversion system for converting an analog signal to a digital signal for recording is configured to detect a low level period of the analog signal, amplify a low noise in the analog signal in the detected period by a predetermined multiplying ratio or by an amount corresponding to the signal amplitude, and subtract from the converted digital signal a number of bits corresponding to the amplification degree in the same period after analog-to-digital conversion, so as to reduce the influence of a noise entering in the analog signal before analog-to-digital conversion.

Abstract translation: 用于将模拟信号转换为用于记录的数字信号的模拟 - 数字转换系统被配置为检测模拟信号的低电平周期，在检测的周期内以预定的倍率放大模拟信号中的低噪声，或 以与信号幅度相对应的量，并且从转换的数字信号中减去与模数转换之后的相同周期中的放大度相对应的位数，以减少进入模拟数字信号的噪声的影响 模数转换前的信号。

公开(公告)号：US4404545A

公开(公告)日：1983-09-13

申请号：US258313

申请日：1981-04-28

Applicant: Tousaku Nakanishi ,  Hiroshi Tsuda

Inventor： Tousaku Nakanishi ,  Hiroshi Tsuda

IPC: H03M1/00 ,  H03K13/02

CPC classification number: H03M1/08 ,  H03M1/52

Abstract: Errors in determining a measured voltage are mathematically canceled in an analog-to-digital converter circuit useful for dual slope type using positive and negative values of a reference voltage. The errors are due to the off-set voltages inherent to operational amplifiers employed for an integrator and a comparator included within the analog-to-digital converter circuit. A counter circuit is provided for storing time information related to first and second dual slopes. A mathematical calculation is conducted with the aid of all the time information of the first and second dual slopes, whereby the measured voltage can be determined with eliminating the influence by the off-set voltage.

Abstract translation: 在使用参考电压的正和负值的双斜率类型的模拟 - 数字转换器电路中，数学地消除了确定测量电压的误差。 误差是由于用于积分器的运算放大器所固有的偏置电压以及包含在模数转换器电路内的比较器。 提供了一种用于存储与第一和第二双斜率相关的时间信息的计数器电路。 借助于第一和第二双斜率的所有时间信息进行数学计算，由此可以通过消除偏置电压的影响来确定测量的电压。

公开(公告)号：US4278964A

公开(公告)日：1981-07-14

申请号：US474280

申请日：1974-05-29

Applicant: James R. Vanderford

Inventor： James R. Vanderford

IPC: H03M1/00 ,  H03K13/02

CPC classification number: H03M1/08 ,  H03M1/785

Abstract: Hereinafter disclosed is methodology and apparatus for converting wide dynamic amplitude range digital data recorded in floating point digital word form, comprising a binary coded mantissa and a binary coded exponent, to an analog signal, or oscillogram, of selectively compressed and/or amplified dynamic amplitude range. The digital word, occupying a number of binary bit positions, is, in algebraic form, .+-.AG.sup.E ; where A represents the mantissa, or argument, G represents the base, or radix, of the number system used and E represents the exponent. Since the base G is constant, for example at 8, the only binary bits that need to be recorded are those representing the mantissa A and the exponent E. In reconverting the digital data to analog form for making an oscillogram, or wiggle trace, it is desired to selectively amplify and/or compress the dynamic range and, yet, at the same time avoid introducing serious distortion. The methodology employed to accomplish such reconversion is to change either, or both, the mantissa A and base, or radix, G in such a way that the dynamic range is compressed and, yet, any distortion thereby introduced is minimal. Apparatus for performing the aforesaid changes, among other things, is disclosed.

Abstract translation: 以下公开了用于将包括二进制编码尾数和二进制编码指数的浮动数字字形式的宽动态幅度数字数据转换为选择性压缩和/或放大的动态幅度的模拟信号或波形图的方法和装置 范围。 占用多个二进制位位置的数字字以代数形式为+/- AGE; 其中A表示尾数或参数，G表示使用的数字系统的基数或基数，E表示指数。 由于基极G是恒定的，例如在8处，需要记录的唯一的二进制位是表示尾数A和指数E的那些。在将数字数据转换为模拟形式以进行波形图或摆动轨迹时 期望选择性地放大和/或压缩动态范围，但是同时避免引入严重的失真。 用于完成这种再转换的方法是以这样的方式改变尾数A和基数或基数G中的任一个或两者，使得动态范围被压缩，然而，由此引入的任何失真是最小的。 公开了用于执行上述改变的装置。

公开(公告)号：US3889254A

公开(公告)日：1975-06-10

申请号：US38123673

申请日：1973-07-20

Applicant: OKI ELECTRIC IND CO LTD

Inventor： KOBAYASHI GORO

IPC: G01R19/255 ,  G01R27/02 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/00 ,  G01R19/255 ,  G01R27/02 ,  H03M1/08

Abstract: In a measuring apparatus in which a digital output is provided by an analogue-digital converter, there are provided a fixed impedance and a variable impedance whose impedance is varied in accordance with a measured quantity which are connected in series across a source of voltage. The terminal voltage across the fixed impedance is applied to the analogue-digital converter to act as the internal reference voltage thereof and the sum of the terminal voltages across the fixed and variable impedances is applied to the analogue-digital converter to act as an input thereto.

Abstract translation: 在其中通过模数转换器提供数字输出的测量装置中，提供固定阻抗和可变阻抗，其阻抗根据跨越电压源串联连接的测量量而变化。 固定阻抗上的端子电压被施加到模拟数字转换器以用作其内部参考电压，并且固定和可变阻抗上的端子电压之和被施加到模拟数字转换器以用作其输入 。

公开(公告)号：US3789389A

公开(公告)日：1974-01-29

申请号：US3789389D

申请日：1972-07-31

Applicant: WESTINGHOUSE ELECTRIC CORP

Inventor： LENHOFF J

IPC: H03M1/14 ,  H03M1/00

CPC classification number: H03M1/00 ,  H03M1/08

Abstract: A method and circuit for varying the amplitude of an analog signal in response to a digital signal particularly suited for use in subranged analog to digital converters. The analog signal is applied to one of two junctions interconnected by an impedance such as a resistor and an output signal is taken from the other of the two junctions. A constant current from one or more sources is selectively switched from one of the junctions to the other in response to the digital signal to thereby modify the amplitude of the analog signal by a discrete amount. The total current flow at the junction to which the analog signal is applied and attributable to the constant current source remains essentially constant irrespective of switching thereby minimizing the effects of switching transients. When utilized in connection with a subranged analog to digital converter, the invention eliminates the need for a differential amplifier or other subtracting circuit.

Abstract translation: 一种用于响应于特别适用于分散的模数转换器的数字信号来改变模拟信号的幅度的方法和电路。 模拟信号被施加到通过诸如电阻器的阻抗互连的两个结中的一个，并且输出信号取自两个结中的另一个。 响应于数字信号，来自一个或多个源的恒定电流从一个结点选择性地切换到另一个，从而将模拟信号的振幅修改离散量。 施加模拟信号并归因于恒定电流源的结的总电流保持基本上恒定，而与切换无关，从而最小化开关瞬变的影响。 当与分散的模数转换器结合使用时，本发明消除了对差分放大器或其它减法电路的需要。

公开(公告)号：US3766545A

公开(公告)日：1973-10-16

申请号：US3766545D

申请日：1972-01-25

Applicant: HIKOSAKA M

Inventor： HIKOSAKA M

IPC: G01R25/00 ,  G01S7/288 ,  H03M1/00 ,  H03D13/00

CPC classification number: H03M1/00 ,  G01R25/00 ,  G01S7/288 ,  H03M1/08

Abstract: Disclosed herein is an improved apparatus for converting an analog signal of unknown phase into a binary-coded digital form. It includes a plurality of phase detectors which compare the analog signal with their associated reference signals having different phases from each other and provide output voltages corresponding to the phase differences. The outputs of the phase detectors are supplied to their associated groups of threshold detectors for comparison with different predetermined reference levels. A logic circuitry is responsive to the outputs of the threshold detectors to generate the binary-coded digital signal. When employed in a radar system, this invention enables the detection of digital video signals directly from the received signals at radio or intermediate frequency without translating them into analog video signals.

Abstract translation: 本文公开了一种用于将未知相位的模拟信号转换为二进制编码数字形式的改进的装置。 它包括多个相位检测器，其将模拟信号与其相关联的参考信号彼此不同，并提供对应于相位差的输出电压。 相位检测器的输出被提供给它们相关的阈值检测器组，以与不同的预定参考电平进行比较。 逻辑电路响应阈值检测器的输出以产生二进制编码的数字信号。 当采用雷达系统时，本发明能够以无线电或中频直接从接收的信号中检测数字视频信号，而不将它们转换为模拟视频信号。

公开(公告)号：US3729621A

公开(公告)日：1973-04-24

申请号：US3729621D

申请日：1971-07-08

Applicant: SOPELEM

Inventor： TAISNE J

IPC: G01D5/36 ,  H03K5/26 ,  H03K21/08 ,  H03M1/00 ,  H03K21/04

CPC classification number: H03K21/08 ,  G01D5/363 ,  H03K5/26 ,  H03M1/00 ,  H03M1/08

Abstract: Relative movement between two members is sensed by a device yielding a signal during successive increments of movement. A first circuit means applies one pulse to a reversible counter for each incremental movement and a second circuit controls the direction of counting to accord with that of movement.

Abstract translation: 两个构件之间的相对运动由连续的运动增量中产生信号的装置感测到。 第一电路装置为每个增量运动向可逆计数器施加一个脉冲，而第二电路控制计数方向与运动方向一致。