Systems and methods for built in self test jitter measurement
    61.
    发明授权
    Systems and methods for built in self test jitter measurement 失效
    内置自检抖动测量的系统和方法

    公开(公告)号:US08283933B2

    公开(公告)日:2012-10-09

    申请号:US12707534

    申请日:2010-02-17

    CPC classification number: G01R29/26 G01R31/31709 H04L1/205

    Abstract: An apparatus configured for built in self test (BIST) jitter measurement is described. The apparatus includes a time-to-voltage converter. The time-to-voltage converter generates a voltage signal proportional to timing jitter present in a clock/data signal input. The apparatus also includes feedback circuitry for the time-to-voltage converter. The feedback circuitry provides a ramp slope for the time-to-voltage converter. The apparatus further includes a calibration controller. The calibration controller provides control signals to the time-to-voltage converter for process-independent calibration. The apparatus also includes a sample-and-hold (S/H) circuit. The S/H circuit provides a set bias voltage to the time-to-voltage converter once calibration is complete.

    Abstract translation: 描述了内置自测(BIST)抖动测量的装置。 该装置包括时间 - 电压转换器。 时间到电压转换器产生与时钟/数据信号输入中存在的定时抖动成比例的电压信号。 该装置还包括用于时间 - 电压转换器的反馈电路。 反馈电路为时间到电压转换器提供斜坡斜率。 该装置还包括校准控制器。 校准控制器为时间到电压转换器提供控制信号,用于与过程无关的校准。 该装置还包括采样保持(S / H)电路。 校准完成后,S / H电路为时间到电压转换器提供设定的偏置电压。

    Self calibrating cable for high definition digital video interface
    62.
    发明授权
    Self calibrating cable for high definition digital video interface 有权
    用于高分辨率数字视频接口的自校准电缆

    公开(公告)号:US08280668B2

    公开(公告)日:2012-10-02

    申请号:US12461031

    申请日:2009-07-30

    CPC classification number: H04L1/205 H04L1/243 H04L7/10 H04L25/03885 H04L25/14

    Abstract: A High Definition Multi-Media Interface (HDMI) cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel. Additional embodiments provide for a selected replica boost device and a distinct pattern generator device in the calibration fixture.

    Abstract translation: 高分辨率多媒体接口(HDMI)电缆可能表现出频率相关的信号衰减,符号间干扰和对之间的偏移。 与电缆集成的升压装置可以补偿电缆的这种损伤。 描述了具有本发明实施例的升压装置的自校准电缆,其中控制升压装置的响应的参数在自校准过程中被最佳地设定,包括通过校准夹具将升压电缆环绕在自身上,该校准夹具包含 校准控制装置。 升压装置包括图案发生器和采样电路。 电缆的每个高速通道可以借助其他通道作为采样通道进行单独测试和校准。 另外的实施例提供了选定的副本升压装置和校准夹具中的不同模式发生器装置。

    System for Independently Modifying Jitter and Noise Components in a Signal Digitizing Instrument
    63.
    发明申请
    System for Independently Modifying Jitter and Noise Components in a Signal Digitizing Instrument 有权
    用于独立修改信号数字化仪器中的抖动和噪声分量的系统

    公开(公告)号:US20120158334A1

    公开(公告)日:2012-06-21

    申请号:US13333970

    申请日:2011-12-21

    CPC classification number: G01R31/31709 H04L1/205

    Abstract: A digitizing instrument is used for modifying pattern data and jitter and noise components of a communication signal. In a typical implementation, the midpoints of a rising edge slope and horizontal portion of the communication signal are determined and multiple digital data records are acquired at the midpoints. The data sample records are transformed to frequency components and the random jitter and noise, and periodic jitter and noise components are determined. A correlated pattern data and the jitter and noise components are matrix elements in a simulated signal channel having communication system elements. Each correlated pattern data and jitter and noise component may be modified for each of the communication system element. The selectively modified correlated pattern data and jitter and noise components are combined to produce a modified communication signal that is displayed as a numeric table, eye diagram or bit error rate presentation.

    Abstract translation: 数字化仪器用于修改通信信号的模式数据和抖动和噪声分量。 在典型的实现中,确定通信信号的上升沿和水平部分的中点,并在中点获取多个数字数据记录。 将数据采样记录转换为频率分量,并确定随机抖动和噪声,并确定周期性抖动和噪声分量。 相关图案数据和抖动和噪声分量是具有通信系统元件的模拟信号通道中的矩阵元素。 可以为每个通信系统元件修改每个相关图案数据和抖动和噪声分量。 选择性地修改的相关图案数据和抖动和噪声分量被组合以产生被显示为数字表,眼图或误码率显示的修改的通信信号。

    Automatic calibration in high-speed serial interface receiver circuitry
    65.
    发明授权
    Automatic calibration in high-speed serial interface receiver circuitry 有权
    高速串行接口电路自动校准

    公开(公告)号:US08098724B2

    公开(公告)日:2012-01-17

    申请号:US12287009

    申请日:2008-10-02

    CPC classification number: H04L25/03885 H04B3/04 H04L1/205 H04L25/03019

    Abstract: Circuitry for receiving a serial data signal (e.g., a high-speed serial data signal) includes adjustable equalizer circuitry for producing an equalized version of the serial data signal. The equalizer circuitry may include controllably variable DC gain and controllably variable AC gain. The circuitry may further include eye height and eye width monitor circuitry for respectively producing first and second output signals indicative of the height and width of the eye of the equalized version. The first output signal may be used in control of the DC gain of the equalizer circuitry, and the second output signal may be used in control of the AC gain of the equalizer circuitry.

    Abstract translation: 用于接收串行数据信号(例如,高速串行数据信号)的电路包括用于产生串行数据信号的均衡版本的可调均衡器电路。 均衡器电路可以包括可控制的可变DC增益和可控可变的AC增益。 电路还可以包括眼睛高度和眼睛宽度监视器电路,用于分别产生指示均衡版本的眼睛的高度和宽度的第一和第二输出信号。 第一输出信号可用于控制均衡器电路的直流增益,并且第二输出信号可用于控制均衡器电路的AC增益。

    Method of determination of transmission quality of a communication link between a transmitter and a receiver and corresponding apparatus
    66.
    发明申请
    Method of determination of transmission quality of a communication link between a transmitter and a receiver and corresponding apparatus 失效
    确定发射机和接收机之间的通信链路的传输质量的方法以及相应的装置

    公开(公告)号:US20110286345A1

    公开(公告)日:2011-11-24

    申请号:US13068770

    申请日:2011-05-19

    CPC classification number: H04L1/205 H04L1/203

    Abstract: The invention proposes a method and apparatus for determination of transmission quality of a communication link between a transmitter and a receiver. Among others, the invention allows to determine the transmission quality of a communication link between a transmitter and a receiver by a tier device, for example a transmission quality testing or monitoring device.

    Abstract translation: 本发明提出了一种用于确定发射机和接收机之间的通信链路的传输质量的方法和装置。 其中,本发明允许通过层设备(例如传输质量测试或监视设备)来确定发射机和接收机之间的通信链路的传输质量。

    Waveform analyzer
    67.
    发明授权
    Waveform analyzer 失效
    波形分析仪

    公开(公告)号:US08054907B2

    公开(公告)日:2011-11-08

    申请号:US11200258

    申请日:2005-08-09

    Abstract: A method and system for removing the effect of intersymbol interference (ISI) from a data record indicating times of logic level transitions exhibited by a data signal that has been distorted by ISI exhibited by a system having a particular step response may perform the following acts. The data record may be received, and a transition from within the data may be selected record for removal of ISI. Preceding transitions within the data record are then inspected. A time defect is obtained, based at least in part upon the inspected preceding transitions. Finally, the data record is adjusted, based upon the time defect, to indicate a new time of transition for the selected transition, thereby removing the effect of ISI for the selected transition.

    Abstract translation: 用于从由具有特定阶跃响应的系统展示的被ISI失真的数据信号所展现的逻辑电平转换的数据记录的数据记录中去除符号间干扰(ISI)的影响的方法和系统可以执行以下动作。 可以接收数据记录,并且可以选择从数据内进行的转换以用于去除ISI。 然后检查数据记录中的先前转换。 至少部分地基于所检查的先前转换获得时间缺陷。 最后,基于时间缺陷来调整数据记录,以指示所选择的转换的新的转换时间,从而消除所选转换的ISI的影响。

    Integrated circuit for network stress testing
    68.
    发明授权
    Integrated circuit for network stress testing 有权
    网络压力测试集成电路

    公开(公告)号:US08036123B1

    公开(公告)日:2011-10-11

    申请号:US11031984

    申请日:2005-01-07

    Applicant: Yuval Cohen

    Inventor: Yuval Cohen

    Abstract: An integrated circuit having a corresponding method comprises a plurality of ports to transmit and receive packets of data; a forwarding engine to transfer the packets of data between the ports; and a controller to receive one or more packet definitions that specify characteristics of a packet; and wherein at least one of the ports comprises a packet generator to originate one or more packets of data according to one or more of the packet definitions received by the controller.

    Abstract translation: 具有相应方法的集成电路包括:多个端口,用于发送和接收数据包; 转发引擎,用于在端口之间传送数据包; 以及控制器,用于接收指定分组特征的一个或多个分组定义; 并且其中所述端口中的至少一个包括分组生成器,以根据由所述控制器接收的分组定义中的一个或多个来发起一个或多个数据分组。

    Self calibrating cable for a high difinition digital video interface
    69.
    发明申请
    Self calibrating cable for a high difinition digital video interface 有权
    用于高分辨率数字视频接口的自校准电缆

    公开(公告)号:US20110238357A1

    公开(公告)日:2011-09-29

    申请号:US13067493

    申请日:2011-06-06

    CPC classification number: H04L1/243 H04L1/205

    Abstract: An HDMI cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel.

    Abstract translation: HDMI电缆可能表现出频率相关的信号衰减,符号间干扰和对之间的偏移。 与电缆集成的升压装置可以补偿电缆的这种损伤。 描述了具有本发明实施例的升压装置的自校准电缆,其中控制升压装置的响应的参数在自校准过程中被最佳地设定,包括通过校准夹具将升压电缆环绕在自身上,该校准夹具包含 校准控制装置。 升压装置包括图案发生器和采样电路。 电缆的每个高速通道都可以借助其他通道作为采样通道进行单独测试和校准。

    Bit stream conditioning circuit having adjustable input sensitivity
    70.
    发明授权
    Bit stream conditioning circuit having adjustable input sensitivity 失效
    位流调节电路具有可调输入灵敏度

    公开(公告)号:US08014471B2

    公开(公告)日:2011-09-06

    申请号:US11970191

    申请日:2008-01-07

    Abstract: A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side interface, and a signal conditioning circuit. The signal conditioning circuit services each of an RX path and a TX path and includes a limiting amplifier and a clock and data recovery circuit. The signal conditioning circuit may also include an equalizer and/or an output pre-emphasis circuit. The limiting amplifier applies respective gains to the RX path and to the TX path that are based upon respective dynamic ranges of the incoming signals.

    Abstract translation: 高速位流接口模块通过印刷电路板(PCB)将高速通信介质与通信专用集成电路(ASIC)接口。 高速比特流接口包括线路侧接口,电路板侧接口和信号调理电路。 信号调理电路为RX路径和TX路径提供服务,并且包括限幅放大器和时钟和数据恢复电路。 信号调理电路还可以包括均衡器和/或输出预加重电路。 限幅放大器根据输入信号的相应动态范围,将相应的增益应用于RX路径和TX路径。

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