公开(公告)号：US20240264972A1

公开(公告)日：2024-08-08

申请号：US18424673

申请日：2024-01-26

Applicant: Rambus Inc.

Inventor： Yohan U. Frans ,  Hae-Chang Lee ,  Brian S. Leibowitz ,  Simon Li ,  Nhat M. Nguyen

IPC: G06F13/42 ,  G06F13/38 ,  G06F13/40 ,  H04L1/00 ,  H04L1/20 ,  H04L1/24 ,  H04L5/14 ,  H04L25/02

CPC classification number: G06F13/4286 ,  G06F13/385 ,  G06F13/4068 ,  H04L1/0002 ,  H04L1/0015 ,  H04L1/203 ,  H04L1/205 ,  H04L1/243 ,  H04L5/1446 ,  H04L25/0262 ,  H04L25/0292 ,  Y02D30/50

Abstract: A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including a calibration mode in which a range of communication data rates over the wired link is determined in accordance with a voltage margin corresponding to the wired link at a predetermined error rate. The range of communication data rates includes a maximum data rate, which can be a non-integer multiple of an initial data rate.

公开(公告)号：US20240241785A1

公开(公告)日：2024-07-18

申请号：US18213907

申请日：2023-06-26

Applicant: Silicon Motion, Inc.

Inventor： Fu-Jen Shih

IPC: G06F11/10 ,  G06F11/30 ,  G06F13/16 ,  H04L1/20

CPC classification number: G06F11/1068 ,  G06F11/3037 ,  G06F13/1673 ,  H04L1/205

Abstract: An interface circuit includes multiple signal processing devices and a monitor and calibration module including multiple monitoring circuits, multiple calibration circuits and a compensation control mechanism operation logic. The monitoring circuits monitor a reception signal, a transmission signal, a power supplying voltage and a ground voltage to correspondingly generate monitored results. The calibration circuits perform a calibration operation on at least one signal processing device to adjust a characteristic value of the signal processing device. The compensation control mechanism operation logic generates a calibration control signal to control the calibration operation of the calibration circuits based on the monitored results and includes a compensation control mechanism selection circuit which selects a corresponding compensation control mechanism according to the monitored results and set it as a currently-operating compensation control mechanism to control the hardware circuits to operate in compliance with the currently-operating compensation control mechanism.

公开(公告)号：US11831747B2

公开(公告)日：2023-11-28

申请号：US17589159

申请日：2022-01-31

Applicant: MARVELL ASIA PTE LTD.

Inventor： Benjamin Smith ,  Jamal Riani

IPC: H04L7/00 ,  H04L1/20

CPC classification number: H04L7/0062 ,  H04L1/205 ,  H04L7/0029 ,  H04L7/0087

Abstract: A receiver includes a feed-forward equalizer, a first detector, a jitter estimation circuit, and a jitter mitigation circuit. The feed-forward equalizer is configured to equalize channel gain of digitized samples of a received signal and to output equalized samples. The first detector is configured to detect symbols in the equalized samples. The jitter estimation circuit is configured to estimate jitter in the equalized samples by estimating a deviation in periodicity between pairs of the equalized samples. The jitter mitigation circuit comprises a linearized FIR filter configured to receive an input including the equalized samples or the detected symbols and to compensate inter symbol interference in the equalized samples due to the jitter as a function of the estimated jitter and an estimate of the inter symbol interference.

公开(公告)号：US11777672B2

公开(公告)日：2023-10-03

申请号：US17653716

申请日：2022-03-07

Applicant: Skywave Networks LLC

Inventor： Kevin J. Babich

IPC: H04L1/20 ,  H04L25/03

CPC classification number: H04L1/205 ,  H04L25/0305

Abstract: A method for equalizing a wireless communication channel includes transmitting a data signal over a primary channel. During transmission of the data signal, a corresponding data signal is sent over a secondary channel. The information received from the secondary channel is compared to the information received from the primary channel and differences between the information received from each of the channels are observed. These differences are used as inputs to an equalizer algorithm that may be used to reduce distortion of the data signal sent over the primary channel.

公开(公告)号：US20190081701A1

公开(公告)日：2019-03-14

申请号：US16110451

申请日：2018-08-23

Applicant: FUJITSU LIMITED

Inventor： Shoichiro Oda ,  Takeshi Hoshida ,  Hisao Nakashima ,  Yi Ge

IPC: H04B10/079 ,  H04L1/20

CPC classification number: H04B10/07953 ,  H04L1/20 ,  H04L1/205

Abstract: A transmission device includes: a receiving unit that receives an optical signal; an acquiring unit that acquires spectrum information from the optical signal, the spectrum information relating to a spectrum of the optical signal; and a narrowing calculating unit that calculates an index value for narrowing of a band of the optical signal by calculating a sampling timing error in accordance with the spectrum information, the sampling timing error being an error when a clock signal is extracted from the optical signal.

公开(公告)号：US20180316369A1

公开(公告)日：2018-11-01

申请号：US16025831

申请日：2018-07-02

Applicant: MaxLinear, Inc.

Inventor： Amir Hadji-Abdolhamid ,  Sheng Ye

IPC: H04B1/04 ,  H04B15/02 ,  H04L1/20 ,  H03M9/00 ,  H03K3/01 ,  H04B1/717

CPC classification number: H04B1/0475 ,  H03K3/01 ,  H03M9/00 ,  H04B1/7174 ,  H04B15/02 ,  H04L1/205 ,  H04L43/087 ,  H04L47/283

Abstract: Systems and methods are provided for handling jitter improvement in transmitters. During processing of input data for serial transmission, it may be determined if jitter may occur, and when jitter occurs one or more adjustments may be determined, based on dummy data, to reduce jitter in an output corresponding to the input data. The one or more adjustments may then be applied during processing of the input data, to reduce jitter in a serial output corresponding to the input data. The dummy data may be generated based on the input data. The dummy data may be configured such that it may generate corresponding dummy current pulses which may be used in controlling supply variations during generation of the serial output. The use of the dummy data may be selectively turned on or off.

公开(公告)号：US20180224885A1

公开(公告)日：2018-08-09

申请号：US15884802

申请日：2018-01-31

Applicant: FUJITSU LIMITED

Inventor： Joshua Liang ,  Ali Sheikholeslami ,  Yuuki Ogata ,  Hirotaka TAMURA

IPC: G06F1/12 ,  H03K5/01 ,  H03K19/23 ,  H03L7/093 ,  G06F13/12 ,  H04L1/20

CPC classification number: G06F1/12 ,  G06F1/04 ,  G06F13/122 ,  H03K5/01 ,  H03K19/23 ,  H03K2005/00058 ,  H03L7/0807 ,  H03L7/0814 ,  H03L7/093 ,  H04L1/205

Abstract: A serial-parallel conversion circuit includes: a phase detector that outputs a first phase detection signal indicating whether a phase of a clock signal is advance or behind, a signal amplifying circuit that amplifies the first phase detection signal with a gain so as to output a second phase detection signal; a control loop that adjusts the phase of the clock signal based on the second phase detection signal; an autocorrelation circuit that generates an autocorrelation value based on the first phase detection signal and a set delay amount, and outputs an autocorrelation signal indicating the autocorrelation value; a gain adjusting circuit that adjusts the gain in such a manner that the autocorrelation value matches a target correlation value; and a delay-amount determination circuit that sets a delay amount corresponding to a peak value of an obtained autocorrelation value obtained when the autocorrelation value changes in an oscillatory manner.

公开(公告)号：US20180080985A1

公开(公告)日：2018-03-22

申请号：US15679484

申请日：2017-08-17

Applicant: MStar Semiconductor, Inc.

Inventor： Yuan Yuan ,  Wen cai Lu

IPC: G01R31/317 ,  H04B10/079 ,  H04L1/20 ,  G06F1/04 ,  H04B17/00 ,  H04B17/10

CPC classification number: G01R31/31708 ,  G01R31/31937 ,  G06F1/04 ,  H03K5/135 ,  H04B10/0795 ,  H04B17/0085 ,  H04B17/104 ,  H04L1/20 ,  H04L1/205

Abstract: A processing method and electronic apparatus for a digital signal are provided. The method includes: detecting the quality of a first eye in an eye diagram of the digital signal; equalizing the digital signal; detecting the quality of a second eye in the eye diagram of the equalized digital signal; determining whether the quality of the second eye superior to the quality of the first eye by a predetermined threshold; and if so, outputting the digital signal, or else again equalizing and performing subsequent steps on the auto-compensated digital signal. The above solution is capable of effectively improving the quality of eyes in the eye diagram of the digital signal.

公开(公告)号：US09843402B1

公开(公告)日：2017-12-12

申请号：US15284676

申请日：2016-10-04

Applicant: Teledyne LeCroy, Inc.

Inventor： Martin T. Miller

IPC: H04B17/23 ,  H04L7/033 ,  H04B17/21 ,  H04L7/00 ,  H04B3/487

CPC classification number: H04B17/23 ,  H04B3/487 ,  H04B17/21 ,  H04L1/205 ,  H04L7/0029 ,  H04L7/0331

Abstract: A method and apparatus for generating a probability density function eye are provided. The method preferably includes the steps of acquiring an input waveform, performing a clock data recovery in accordance with the input waveform to determine one or more expected transition times and defining a plurality of unit intervals of the input waveform in accordance with the one or more expected transition times. One or more values of one or more data points may then be determined in accordance with the input waveform in accordance with the one or more expected transition times, and a category for each unit interval in accordance with its state and its position within the input waveform may also be determined. One or more histograms may then be generated for the determined one or more values for each category of unit intervals.

公开(公告)号：US09729417B2

公开(公告)日：2017-08-08

申请号：US14737018

申请日：2015-06-11

Applicant: FUJI XEROX CO., LTD.

Inventor： Roshan Thapliya ,  Chaoxin Hu

IPC: H04L12/26 ,  H04L29/14 ,  H04L1/16 ,  H04L1/18 ,  H04L1/20 ,  H04W80/00

CPC classification number: H04L43/0841 ,  H04L1/1657 ,  H04L1/1832 ,  H04L1/203 ,  H04L1/205 ,  H04L43/0835 ,  H04L43/0864 ,  H04L43/10 ,  H04L69/40 ,  H04W80/00

Abstract: An information terminal sequentially transmits one or more packets to an information distribution server, receives acknowledgments for the transmitted packets from the information distribution server, and records a round trip time and occurrence of packet loss for each of the transmitted packets. Among one or more packet sequences, the information terminal counts the number of packet sequences which are such that the number of packet losses included in each of the packet sequences and an increase state of the round trip time for packets included in the packet sequence satisfy respective predetermined conditions. Each of the one or more packet sequences has multiple continuous packets including one or more packets, for which packet loss is recorded among the transmitted packets, at the top. The information terminal calculates a packet loss ratio on the basis of the counted number and the number of transmitted packets.