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    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
    71.
    发明申请
    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20170116083A1

    公开(公告)日：2017-04-27

    申请号：US15064186

    申请日：2016-03-08

    Applicant: SK hynix Inc.

    Inventor： Won Sun PARK ,  Mi Ock CHI

    IPC: G06F11/14 ,  G06F3/06

    CPC classification number: G06F11/142 ,  G06F3/0619 ,  G06F3/0632 ,  G06F3/0644 ,  G06F3/0673 ,  G06F2201/805 ,  G06F2201/85 ,  G11C16/10 ,  G11C16/3459

    Abstract: In one aspect of the present disclosure, there is provided a memory system comprising a memory device configured to temporarily store data therein, the data being loaded thereon for programming a selected page among multiple pages, the memory device further configured to program the selected page using the data; and a controller configured to send the data to the memory device, wherein the controller is further configured to control the memory device such that, in a failure event of the program for the selected page the memory device re-programs another page using the data temporarily stored therein without receipt of further data from the controllers

    TRANSACTION LOG LAYOUT FOR EFFICIENT RECLAMATION AND RECOVERY
    74.
    发明申请
    TRANSACTION LOG LAYOUT FOR EFFICIENT RECLAMATION AND RECOVERY 审中-公开

    公开(公告)号：US20170097873A1

    公开(公告)日：2017-04-06

    申请号：US14876572

    申请日：2015-10-06

    Applicant: NetApp, Inc.

    Inventor： Srinath Krishnamachari ,  Anshul Pundir ,  Sriranjani Babu

    IPC: G06F11/14

    CPC classification number: G06F3/0604 ,  G06F3/0631 ,  G06F3/0688 ,  G06F11/1076 ,  G06F11/1471 ,  G06F11/1474 ,  G06F2201/805 ,  G06F2201/85

    Abstract: A layout of a transaction log enables efficient logging of metadata into entries of the log, as well as efficient reclamation and recovery of the log entries by a volume layer of a storage input/output (I/O) stack executing on one or more nodes of a cluster. The transaction log is illustratively a two stage, append-only logging structure, wherein the first level is non-volatile random access memory (NVRAM) embodied as a NVlog and the second stage is disk, e.g., solid state drive (SSD). During crash recovery, the log entries are examined for consistency and scanned to identify those entries that have completed and those that are active, which require replay. The log entries are walked from oldest to newest (using sequence numbers) searching for the highest sequence number. Partially complete log entries (e.g., log entries in-progress when a crash occurs) may be discarded for failing a checksum (e.g., a CRC error). Old value/new value logs may be used to implement roll-forward or roll-back semantics to replay the log entries and fix any on-disk data structures, first from NVRAM and then from on-disk logs.

    Methods and systems for die failure testing
    76.
    发明授权
    Methods and systems for die failure testing 有权

    公开(公告)号：US09606882B2

    公开(公告)日：2017-03-28

    申请号：US14596177

    申请日：2015-01-13

    Applicant: SanDisk Enterprise IP LLC

    Inventor： Scott Creasman ,  James M. Higgins

    IPC: G06F11/00 ,  G06F11/20 ,  G11C29/02

    CPC classification number: G06F11/2094 ,  G06F2201/805 ,  G06F2201/85 ,  G11C29/02 ,  G11C29/028

    Abstract: The disclosed method includes, at a storage controller of a storage system, receiving host instructions to modify configuration settings corresponding to a first memory portion of a plurality of memory portions. The method includes, in response to receiving the host instructions to modify the configuration settings, identifying the first memory portion from the host instructions and modifying the configuration settings corresponding to the first memory portion, in accordance with the host instructions. The method includes, after modifying the configuration settings corresponding to the first memory portion, sending one or more commands to perform memory operations having one or more physical addresses corresponding to the first memory portion and receiving a failure notification indicating failed performance of at least a first memory operation of the one or more memory operations. The method includes, in response to receiving the failure notification, executing one or more error recovery mechanisms.

    System and method for maintaining a copy of a cloud-based computing environment and restoration thereof
    78.
    发明授权
    System and method for maintaining a copy of a cloud-based computing environment and restoration thereof 有权
    用于维护基于云计算环境的副本的系统和方法及其恢复

    公开(公告)号：US09582386B2

    公开(公告)日：2017-02-28

    申请号：US14205083

    申请日：2014-03-11

    Applicant: CloudEndure, Ltd.

    Inventor： Ofer Gadish ,  Leonid Feinberg ,  Ofir Ehrlich ,  Gil Shai

    IPC: G06F17/30 ,  G06F11/20 ,  G06F11/14

    CPC classification number: G06F11/2094 ,  G06F11/1482 ,  G06F11/2097 ,  G06F2201/85 ,  H04L67/10

    Abstract: A method and system for securing continued operation of a primary cloud-based computing environment (CBCE) residing in a first cloud environment are disclosed. The system comprises gathering information respective of the primary CBCE; storing the gathered information in a storage space, wherein the gathered information substantially provides a baseline to initiate the creation of a reconstructed CBCE upon a need to recreate the primary CBCE; updating the gathered information with new information gathered respective of changes to the primary CBCE; receiving a periodic status notification from the primary CBCE; and initiating a reconstruction of the primary CBCE in the second cloud environment responsive to the status notification requesting one of: a reconstruction request and failure of the primary CBCE.

    Abstract translation: 公开了一种用于确保驻留在第一云环境中的基于云的计算环境（CBCE）的持续操作的方法和系统。 该系统包括收集主要CBCE的相关信息; 将收集的信息存储在存储空间中，其中所收集的信息基本上提供基线，以在需要重新创建主要CBCE时启动重构的CBCE的创建; 用新的信息更新收集到的信息，分别收集对主要CBCE的变化; 接收来自主要CBCE的定期状态通知; 并响应状态通知，在第二个云环境中启动主要CBCE的重建，请求以下方面之一：主要CBCE的重建请求和故障。

    Temporary pipeline marking for processor error workarounds
    79.
    发明授权
    Temporary pipeline marking for processor error workarounds 有权
    处理器错误解决方法的临时管道标记

    公开(公告)号：US09575836B2

    公开(公告)日：2017-02-21

    申请号：US15251316

    申请日：2016-08-30

    Applicant: International Business Machines Corporation

    Inventor： Erez Barak ,  Steven R. Carlough ,  Eyal Gonen ,  Juergen Haess ,  Silvia M. Mueller

    IPC: G06F11/00 ,  G06F11/14 ,  G06F9/38

    CPC classification number: G06F11/142 ,  G06F9/3867 ,  G06F11/0721 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/2028 ,  G06F11/3024 ,  G06F11/3466 ,  G06F2201/805 ,  G06F2201/82 ,  G06F2201/85 ,  G06F2201/86

    Abstract: Embodiments include a computer system for temporary pipeline marking for processor error workarounds, the computer system having a processor configured to perform a method. The method includes monitoring a pipeline of the processor for an event that is predetermined to place the processor in a stuck state that results in an errant instruction execution result due to the stuck state or repeated resource contention causing performance degradation. The pipeline is marked for a workaround action based on detecting the event. A clearing action is triggered based on the marking of the pipeline. The marking of the pipeline is cleared based on the triggering of the clearing action.

    Abstract translation: 实施例包括用于处理器错误解决方案的临时管道标记的计算机系统，该计算机系统具有被配置为执行方法的处理器。 该方法包括监视处理器的流水线，用于预定的事件，以使处理器处于由于卡住状态或重复的资源争用导致性能下降而导致错误指令执行结果的卡住状态。 管道被标记为基于检测事件的解决方法操作。 基于管道的标记触发清除动作。 基于触发清除动作，管道的标记被清除。

    SYSTEMS, METHODS, AND APPARATUS FOR FREQUENCY RESET OF A MEMORY
    80.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR FREQUENCY RESET OF A MEMORY 审中-公开
    用于存储器频率重置的系统，方法和装置

    公开(公告)号：US20170031785A1

    公开(公告)日：2017-02-02

    申请号：US15170742

    申请日：2016-06-01

    Applicant: QUALCOMM Incorporated

    Inventor： Edwin JOSE ,  Tao WANG

    IPC: G06F11/14 ,  G06F3/06

    CPC classification number: G06F11/1471 ,  G06F3/0619 ,  G06F3/0632 ,  G06F3/0679 ,  G06F13/1668 ,  G06F2201/805 ,  G06F2201/84 ,  G06F2201/85

    Abstract: Some aspects of the disclosure include a self-refresh entry sequence for a memory, such as a DRAM, that may be used to avoid a frequency mismatch between a system processor and a system memory. The self-refresh entry sequence may signal the memory to reset the frequency set point state and default to the power-up state upon a self-refresh process exit. In another aspect, a new mode register may be used to indicate that the frequency set point needs to be reset after the next self-refresh entry command. In this aspect, the processor will execute a mode register write command followed by a self-refresh entry in response to the occurrence of a crash event. Then, the memory will reset to the default frequency set point by the end of self-refresh entry execution.

    Abstract translation: 本公开的一些方面包括用于诸如DRAM的存储器的自刷新入口序列，其可以用于避免系统处理器和系统存储器之间的频率不匹配。 自刷新入口序列可能会在存储器中发信号通知复位频率设定点状态，并在自刷新过程退出时默认为上电状态。 另一方面，可以使用新的模式寄存器来指示频率设定点需要在下一个自刷新输入命令之后复位。 在这方面，处理器将执行模式寄存器写入命令，随后响应于碰撞事件的发生而进行自刷新条目。 然后，在自刷新输入执行结束时，存储器将重置为默认频率设定点。

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