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    MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE
    71.
    发明申请
    MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE 有权
    多层印刷线路板，具有填充的结构

    公开(公告)号：US20080264686A1

    公开(公告)日：2008-10-30

    申请号：US12164710

    申请日：2008-06-30

    Applicant: Seiji SHIRAI ,  Kenichi Shimada ,  Motoo Asai

    Inventor： Seiji SHIRAI ,  Kenichi Shimada ,  Motoo Asai

    IPC: H01R12/04

    CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/382 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/0278 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31681

    Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

    Abstract translation: 本发明提供了一种多层印刷线路板，其具有有利地用于在其上形成精细电路图案的填充通孔结构，并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层组成，层间绝缘树脂层各自形成有各自填充有镀层的孔，以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦，并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半，小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙，并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂，氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。

    Multilayer printed wiring board with filled viahole structure
    73.
    发明授权
    Multilayer printed wiring board with filled viahole structure 有权
    多层印刷线路板，带有通孔结构

    公开(公告)号：US07390974B2

    公开(公告)日：2008-06-24

    申请号：US11020035

    申请日：2004-12-23

    Applicant: Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

    Inventor： Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

    IPC: H01R12/04

    CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/382 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/0278 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31681

    Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

    Abstract translation: 本发明提供了一种多层印刷线路板，其具有有利地用于在其上形成精细电路图案的填充通孔结构，并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层组成，层间绝缘树脂层各自形成有各自填充有镀层的孔，以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦，并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半，小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙，并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂，氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。

    Circuit board and production method therefor
    78.
    发明申请
    Circuit board and production method therefor 审中-公开

    公开(公告)号：US20060210780A1

    公开(公告)日：2006-09-21

    申请号：US11434931

    申请日：2006-05-17

    Applicant: Toshihiro Nishii

    Inventor： Toshihiro Nishii

    IPC: B32B3/00

    CPC classification number: H05K3/4688 ,  H05K1/0366 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0278 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/10378 ,  Y10T428/24917

    Abstract: A method of manufacturing a circuit board comprising: an inner layer board laminating step for laminating inner layer board material and one or more metal sheet(s) for inner layer; an inner layer circuit forming step for forming circuits of the metal sheet to make an inner layer circuit board; a multi-layer laminating step for laminating one or more metal sheet(s) for multi-layer, one or more multi-layer board material(s) and one or more inner layer circuit board(s); and a multi-layer circuit forming step for forming circuits of the metal sheet for the multi-layer, wherein the inner layer board material and the multi-layer board material are different in material composition from each other. According to the present invention, it is possible to stabilize the quality of interstitial connection of the inner layer circuit board and to improve the mechanical strength such as the adhesive strength of an outer layer circuit.

    Multilayer printed wiring board with filled viahole structure
    80.
    发明申请
    Multilayer printed wiring board with filled viahole structure 有权

    公开(公告)号：US20060159885A1

    公开(公告)日：2006-07-20

    申请号：US11385904

    申请日：2006-03-22

    Applicant: Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

    Inventor： Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

    IPC: B32B3/10 ,  B32B3/00

    CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/382 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/0278 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31681

    Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

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