公开(公告)号：US20140166348A1

公开(公告)日：2014-06-19

申请号：US14106135

申请日：2013-12-13

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Suk Hyeon Cho

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H05K1/0373 ,  H05K3/285 ,  H05K3/4655 ,  H05K2201/068

Abstract: Disclosed herein is a printed circuit board capable of suppressing warpage due to a difference in thermal expansion coefficients with circuit patterns in the same layer by way of forming a filling material having a thermal expansion coefficient similar to that of the circuit pattern between the circuit patterns and on the surface. Further, on a surface of the filling material, a laminate having a thermal expansion amount lower than that of the filling material so that overall thermal expansion coefficients of the printed circuit board is lowered, and an insulation material having a lower thermal expansion coefficient and thus rarely flowing is easily attached.

Abstract translation: 这里公开了一种印刷电路板，其能够通过形成具有与电路图案和电路图案之间的电路图案的热膨胀系数相似的热膨胀系数的填充材料，来抑制由于与同一层中的电路图案的热膨胀系数的差异而产生的翘曲 在表面上。 此外，在填充材料的表面上，具有低于填充材料的热膨胀量的层压体，使得印刷电路板的整体热膨胀系数降低，并且具有较低热膨胀系数的绝缘材料 很少流动很容易附着。

公开(公告)号：US08742553B2

公开(公告)日：2014-06-03

申请号：US13690570

申请日：2012-11-30

Applicant: Ibiden Co., Ltd.

Inventor： Naoto Ishida ,  Takema Adachi

IPC: H01L23/495

CPC classification number: H01L23/49544 ,  H01L23/49811 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/0298 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/068

Abstract: A printed wiring board includes a core substrate, a first buildup layer laminated on a first surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on a second surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost conductive layer of the first buildup layer includes pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer.

Abstract translation: 印刷电路板包括芯基板，层叠在芯基板的第一表面上并且包括最外层间树脂绝缘层的第一累积层和形成在第一堆积层的最外层间树脂绝缘层上的最外导电层，以及 层叠在所述芯基板的第二表面上并且包括最外层间树脂绝缘层和形成在所述第二堆积层的最外层间树脂绝缘层上的最外导体层的第二堆积层。 第一累积层的最外面的导电层包括定位成将半导体器件安装在第一堆积层的表面上的焊盘，第一堆积层的最外层间树脂绝缘层的热膨胀系数设定为低于热 第二堆积层的最外层间树脂绝缘层的膨胀系数。

公开(公告)号：US08722191B2

公开(公告)日：2014-05-13

申请号：US12281242

申请日：2007-02-27

Applicant: Hideki Kitano ,  Haruyuki Hatano

Inventor： Hideki Kitano ,  Haruyuki Hatano

IPC: B32B27/38 ,  B32B5/14 ,  C08G59/40 ,  H05K1/03

CPC classification number: H05K1/0373 ,  B32B5/26 ,  B32B2260/023 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2307/536 ,  B32B2307/734 ,  B32B2457/08 ,  C08J5/24 ,  H05K2201/0209 ,  H05K2201/068 ,  Y10T428/31511 ,  Y10T428/31515

Abstract: There is provided an intermediate layer material including a curing type resin composition and a fiber base material, to be used to form an intermediate layer of a composite laminate, wherein a cured material obtained by curing the intermediate layer material at a temperature of 180° C. has such properties as (i) a planar linear expansion coefficient (α1) equal to or lower than 20 ppm/° C., in a range equal to or higher than 25° C. and equal to or lower than a glass transition temperature (Tg); and (ii) a Barcol hardness equal to or more than 40 and equal to or less than 65, at 25° C.

Abstract translation: 提供了包含固化型树脂组合物和纤维基材的中间层材料，用于形成复合层压体的中间层，其中通过在180℃的温度下固化中间层材料而获得的固化材料 具有（i）等于或低于20ppm /℃的平面线性膨胀系数（α1）等于或高于25℃并且等于或低于玻璃化转变温度 （Tg）; 和（ii）在25℃下等于或大于40且等于或小于65的巴氏硬度

公开(公告)号：US08707554B2

公开(公告)日：2014-04-29

申请号：US12979474

申请日：2010-12-28

Applicant: Shinnosuke Maeda ,  Tetsuo Suzuki ,  Takuya Hando ,  Tatsuya Ito ,  Satoshi Hirano ,  Atsuhiko Sugimoto

Inventor： Shinnosuke Maeda ,  Tetsuo Suzuki ,  Takuya Hando ,  Tatsuya Ito ,  Satoshi Hirano ,  Atsuhiko Sugimoto

IPC: H01R9/00 ,  H05K3/00

CPC classification number: H05K1/0298 ,  H01L21/4846 ,  H01L23/49822 ,  H01L2224/16225 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K3/0055 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract translation: 在堆积步骤中，将多个树脂绝缘层和多个导电层以多层布置交替层叠在可分离地层叠在基材侧上的金属箔上，从而形成布线层压体部分。 在钻井工序中，通过激光钻孔在最外层的树脂绝缘层上形成多个开口，露出连接端子。 随后，在去污步骤中，去除开口内部的污迹。 在堆积步骤之后执行的基材除去步骤中，除去基材并暴露金属箔。

公开(公告)号：US08704359B2

公开(公告)日：2014-04-22

申请号：US13118650

申请日：2011-05-31

Applicant: Risto Tuominen ,  Petteri Palm ,  Antti Iihola

Inventor： Risto Tuominen ,  Petteri Palm ,  Antti Iihola

IPC: H01L23/12 ,  H01L23/053

CPC classification number: H05K1/188 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/05 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L25/0652 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K1/0366 ,  H05K1/115 ,  H05K1/185 ,  H05K3/38 ,  H05K3/4611 ,  H05K2201/0355 ,  H05K2201/068 ,  H05K2203/063 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

Abstract: This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component (6) is glued (5) to the surface of a conductive layer, from which conductive layer conductive patterns (14) are later formed. After gluing the component (6), an insulating-material layer (1), which surrounds the component (6) attached to the conductive layer, is formed on, or attached to the surface of the conductive layer. After the gluing of the component (6), feed-throughs are also made, through which electrical contacts can be made between the conductive layer and the contact zones (7) of the component. After this, conductive patterns (14) are made from the conductive layer, to the surface of which the component (6) is glued.

Abstract translation: 该出版物公开了一种用于制造电子模块的电子模块和方法，其中将组件（6）胶合（5）到导电层的表面，稍后形成导电层导电图案（14）。 在粘合组件（6）之后，在导电层的表面上形成或附着到导电层的表面上的围绕附着在导电层上的部件（6）的绝缘材料层（1）。 在组件（6）的胶合之后，还制成馈通，通过它可以在导电层和部件的接触区域（7）之间形成电接触。 此后，导电图案（14）由导电层制成，其表面部件（6）被胶合。

公开(公告)号：US20140104016A1

公开(公告)日：2014-04-17

申请号：US14053170

申请日：2013-10-14

Applicant: Jeffery J. Nummerdor

Inventor： Jeffery J. Nummerdor

IPC: H01P1/20 ,  F16M13/02

CPC classification number: F16M13/02 ,  H01P1/205 ,  H01P1/2056 ,  H03H1/02 ,  H03H7/0138 ,  H05K1/0233 ,  H05K1/0243 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2201/1006

Abstract: A combination RF filter and printed circuit board assembly wherein the RF filter is defined by a block of dielectric material including at least first and second side surfaces. A metal bracket with a plurality of fingers is secured to each of the first and second side surfaces. The fingers on the brackets extend through respective apertures in the printed circuit board and are soldered to the printed circuit board. The brackets relieve and transfer the thermal and mechanical stresses that result from use of a filter and printed circuit board that are made of materials with different thermal and mechanical characteristics and reduce the risk of cracking or damage to the filter, the printed circuit board, and the solder joints during use.

Abstract translation: 一种组合RF滤波器和印刷电路板组件，其中RF滤波器由包括至少第一和第二侧表面的电介质材料块限定。 具有多个指状物的金属支架固定到第一和第二侧表面中的每一个。 托架上的指状物延伸穿过印刷电路板中的相应孔，并被焊接到印刷电路板。 支架减轻并传递由使用由具有不同热和机械特性的材料制成的过滤器和印刷电路板产生的热和机械应力，并降低开裂或损坏过滤器，印刷电路板和 使用时的焊点。

公开(公告)号：US08679263B2

公开(公告)日：2014-03-25

申请号：US12918169

申请日：2009-02-19

Applicant: Masami Aihara

Inventor： Masami Aihara

IPC: B23K35/34

CPC classification number: B23K1/0016 ,  B23K35/0222 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/36 ,  B23K35/3612 ,  B23K35/3613 ,  C21D2251/00 ,  H05K3/3442 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/068 ,  Y02P10/212

Abstract: Disclosed is a solder bonding structure which is capable of retaining sufficient solder bonding strength and ensuring high bonding reliability even in severe environments having an extremely large temperature difference. In the solder bonding structure, an electronic component 4 is mounted on a main surface 1a of a substrate having an electrode section 2 and an insulating film 3, and the electrode section 2 and the electronic component 4 are electrically bonded to each other through a solder section 5, and a flux residue 6 exuded from the solder section 5 is present between the electronic component 4 and the insulating film 3. The flux contains an acrylic resin, an activating agent, and a thixotropic agent having a hydroxyl group. The glass transition point of the acrylic resin is not higher than −40° C., or not lower than the softening temperature of the flux residue. The flux residue has a maximum value of 300×10−6/K or less of linear thermal expansion coefficient within a temperature range from −40° C. to the softening temperature of the flux residue.

Abstract translation: 公开了一种能够保持足够的焊接接合强度并且即使在具有非常大的温度差的恶劣环境中也确保高的接合可靠性的焊接接合结构。 在焊接结构中，电子部件4安装在具有电极部2和绝缘膜3的基板的主面1a上，电极部2和电子部件4通过焊料彼此电接合 并且在电子部件4和绝缘膜3之间存在从焊料部5渗出的焊剂残渣6。焊剂含有丙烯酸树脂，活化剂和具有羟基的触变剂。 丙烯酸树脂的玻璃化转变点不高于-40℃，或不低于焊剂残留物的软化温度。 焊剂残留物在-40℃至焊剂残留物的软化温度范围内的线性热膨胀系数的最大值为300×10 -6 / K以下。

公开(公告)号：US20140017397A1

公开(公告)日：2014-01-16

申请号：US14030579

申请日：2013-09-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Mi Sun HWANG ,  Jae Joon Lee ,  Myung Sam Kang

IPC: H05K3/10

CPC classification number: H05K3/10 ,  H05K1/0271 ,  H05K1/09 ,  H05K3/4602 ,  H05K2201/0338 ,  H05K2201/0352 ,  H05K2201/068 ,  H05K2201/09136

Abstract: A method of manufacturing a printed circuit board includes arranging a core layer in which a bending prevention portion of at least two layers that are metal layers having different thermal expansion coefficients is disposed between a plurality of insulating members; forming a circuit pattern so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and forming an insulating layer including an opening portion that exposes the circuit pattern on the core layer.

Abstract translation: 制造印刷电路板的方法包括：布置芯层，其中在多个绝缘构件之间布置有具有不同热膨胀系数的金属层的至少两层的至少两层的弯曲防止部分; 形成电路图案，以便在芯层的内部和芯层的外表面中的至少一个上具有期望的图案; 以及形成包括露出所述芯层上的电路图案的开口部分的绝缘层。

公开(公告)号：US20140015121A1

公开(公告)日：2014-01-16

申请号：US13939442

申请日：2013-07-11

Applicant: SHINKO ELECTRIC INDUSTRIES, CO. LTD.

Inventor： Naoyuki Koizumi ,  Jun Furuichi ,  Yasuyoshi Horikawa

IPC: H01L23/48

CPC classification number: H01L23/48 ,  H01L21/486 ,  H01L23/13 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/4605 ,  H05K2201/0187 ,  H05K2201/068 ,  H05K2201/09145 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/014

Abstract: A wiring substrate includes: a core substrate made of glass and having: a first surface; a second surface opposite to the first surface; and a side surface between the first surface and the second surface; and an insulating layer and a wiring layer, which are formed on at least one of the first surface and the second surface of the core substrate. A plurality of concave portions are formed in the side surface of the core substrate to extend from the first surface to the second surface, and a resin is filled in the respective concave portions.

Abstract translation: 布线基板包括：由玻璃制成的芯基板，具有：第一表面; 与第一表面相对的第二表面; 以及所述第一表面和所述第二表面之间的侧表面; 以及形成在芯基板的第一表面和第二表面中的至少一个上的绝缘层和布线层。 在芯基板的侧面形成多个凹部，从第一面向第二面延伸，在各凹部填充树脂。

公开(公告)号：US20140014521A1

公开(公告)日：2014-01-16

申请号：US14029637

申请日：2013-09-17

Applicant: ARAKAWA CHEMICAL INDUSTRIES, LTD.

Inventor： Akihisa HAMAZAWA ,  Koji Nishimura ,  Hideki Goda

IPC: H05K1/02

CPC classification number: H05K1/0277 ,  H05K1/0346 ,  H05K1/0373 ,  H05K1/0393 ,  H05K3/108 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/0344 ,  H05K2201/068 ,  Y10T29/49124

Abstract: An object of the present invention is to provide a flexible circuit board that maintains high insulation reliability, exhibits high wiring adhesion, has low thermal expansion, and allows the formation of a fine circuit thereon. Specifically, the present invention provides a flexible circuit board, wherein at least a nickel plating layer is laminated on a polyimide film to form a polyimide film provided with a nickel plating layer and a wiring pattern is applied to the nickel plating layer thereof. The polyimide film has a thermal expansion coefficient of 0 to 8 ppm/° C. in the temperature range from 100 to 200° C., and the nickel plating layer has a thickness of 0.03 to 0.3 μm.

Abstract translation: 本发明的目的是提供一种保持高绝缘可靠性，显示出高布线附着力，低热膨胀性并且允许在其上形成微细电路的柔性电路板。 具体地说，本发明提供一种挠性电路基板，其中，在聚酰亚胺膜上层叠有至少一层镍镀层，形成具有镀镍层的聚酰亚胺膜，并且对其镀镍层施加布线图案。 聚酰亚胺膜在100〜200℃的温度范围内的热膨胀系数为0〜8ppm /℃，镍镀层的厚度为0.03〜0.3μm。