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公开(公告)号:US20250037988A1
公开(公告)日:2025-01-30
申请号:US18914437
申请日:2024-10-14
Applicant: ASM IP Holding B.V.
Inventor: Varun Sharma , Daniele Chiappe , Eva Tois , Viraj Madhiwala , Marko Tuominen , Charles Dezelah , Michael Givens , Tom Blomberg
IPC: H01L21/02
Abstract: The current disclosure relates to methods of depositing silicon oxide on a substrate, methods of forming a semiconductor device and a method of forming a structure. The method comprises providing a substrate in a reaction chamber, providing a silicon precursor in the reaction chamber, the silicon precursor comprising a silicon atom connected to at least one oxygen atom, the at least one oxygen atom being connected to a carbon atom, and providing a reactant comprising hydrogen atoms in the reaction chamber to form silicon oxide on the substrate.
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公开(公告)号:US12205820B2
公开(公告)日:2025-01-21
申请号:US17808741
申请日:2022-06-24
Applicant: ASM IP HOLDING B.V.
Inventor: Eva E. Tois , Hidemi Suemori , Viljami J. Pore , Suvi P. Haukka , Varun Sharma
IPC: H01L21/285 , B05D1/00 , C23C16/02 , C23C16/04 , C23C16/455 , C23C16/56 , H01L21/02 , H01L21/3065 , H01L21/311 , H01L21/768
Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity.
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公开(公告)号:US12142479B2
公开(公告)日:2024-11-12
申请号:US17140997
申请日:2021-01-04
Applicant: ASM IP Holding B.V.
Inventor: Varun Sharma
IPC: H01L21/31 , H01L21/02 , H01L21/469
Abstract: Methods for depositing silicon-containing thin films on a substrate in a reaction space are provided. The methods can include vapor deposition processes comprising at least one deposition cycle including sequentially contacting the substrate with a silicon precursor comprising a halosilane and a second reactant comprising an acyl halide. In some embodiments a Si(O,C,N) thin film is deposited and the concentration of nitrogen and carbon in the film can be tuned by adjusting the deposition conditions.
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公开(公告)号:US11956977B2
公开(公告)日:2024-04-09
申请号:US17462181
申请日:2021-08-31
Applicant: ASM IP Holding B.V.
Inventor: Tom E. Blomberg , Varun Sharma , Jan Willem Maes
CPC classification number: H10B69/00 , H01L21/02538 , H01L21/0262 , H01L21/02658 , H01L28/00 , H10B43/27 , H10B41/27 , H10B41/35 , H10B43/35
Abstract: A method for forming a V-NAND device is disclosed. Specifically, the method involves deposition of at least one of semiconductive material, conductive material, or dielectric material to form a channel for the V-NAND device. In addition, the method may involve a pretreatment step where ALD, CVD, or other cyclical deposition processes may be used to improve adhesion of the material in the channel.
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公开(公告)号:US20240026548A1
公开(公告)日:2024-01-25
申请号:US18349444
申请日:2023-07-10
Applicant: ASM IP HOLDING B.V.
Inventor: Tom E. Blomberg , Varun Sharma , Suvi Haukka , Marko Tuominen , Chiyu Zhu
IPC: C23F4/02 , C23F1/12 , H01L21/3213 , C09K13/00 , H01L21/311 , C09K13/08 , C09K13/10 , H01J37/32 , H01L21/3065
CPC classification number: C23F4/02 , C23F1/12 , H01L21/32135 , C09K13/00 , H01L21/31122 , C09K13/08 , C09K13/10 , H01J37/32009 , H01J37/3244 , H01L21/3065 , H01L21/31116 , H01L21/31138
Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
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公开(公告)号:US11739428B2
公开(公告)日:2023-08-29
申请号:US17646389
申请日:2021-12-29
Applicant: ASM IP HOLDING B.V.
Inventor: Tom E. Blomberg , Varun Sharma , Suvi Haukka , Marko Tuominen , Chiyu Zhu
IPC: C23F4/02 , C23F1/12 , H01L21/3213 , C09K13/00 , H01L21/311 , C09K13/08 , C09K13/10 , H01J37/32 , H01L21/3065
CPC classification number: C23F4/02 , C09K13/00 , C09K13/08 , C09K13/10 , C23F1/12 , H01J37/32009 , H01J37/3244 , H01L21/3065 , H01L21/31116 , H01L21/31122 , H01L21/32135 , H01L21/31138
Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
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公开(公告)号:US20230268187A1
公开(公告)日:2023-08-24
申请号:US18156085
申请日:2023-01-18
Applicant: ASM IP HOLDING B.V.
Inventor: Charles Dezelah , Varun Sharma
IPC: H01L21/3065 , C23F1/32
CPC classification number: H01L21/30655 , C23F1/32 , H01J37/32009
Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which a substrate comprising a metal, metal oxide, metal nitride or metal oxynitride layer is contacted with an etch reactant comprising an vapor-phase N-substituted derivative of amine compound. In some embodiments the etch reactant reacts with the substrate surface to form volatile species including metal atoms from the substrate surface. In some embodiments a metal or metal nitride surface is oxidized as part of the ALE cycle. In some embodiments a substrate surface is contacted with a halide as part of the ALE cycle. In some embodiments a substrate surface is contacted with a plasma reactant as part of the ALE cycle.
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公开(公告)号:US20230253182A1
公开(公告)日:2023-08-10
申请号:US18188255
申请日:2023-03-22
Applicant: ASM IP HOLDING B.V.
Inventor: Tom E. Blomberg , Varun Sharma , Suvi P. Haukka , Marko Tuominen , Chiyu Zhu
IPC: H01J37/32 , C23F1/12 , H01L21/311 , C23G5/00 , H01L21/3213
CPC classification number: H01J37/32009 , C23F1/12 , H01L21/31116 , C23G5/00 , H01L21/32135
Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.
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公开(公告)号:US11574813B2
公开(公告)日:2023-02-07
申请号:US17114264
申请日:2020-12-07
Applicant: ASM IP Holding B.V.
Inventor: Charles Dezelah , Varun Sharma
IPC: H01L21/3065 , C23F1/32 , H01J37/32
Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which a substrate comprising a metal, metal oxide, metal nitride or metal oxynitride layer is contacted with an etch reactant comprising an vapor-phase N-substituted derivative of amine compound. In some embodiments the etch reactant reacts with the substrate surface to form volatile species including metal atoms from the substrate surface. In some embodiments a metal or metal nitride surface is oxidized as part of the ALE cycle. In some embodiments a substrate surface is contacted with a halide as part of the ALE cycle. In some embodiments a substrate surface is contacted with a plasma reactant as part of the ALE cycle.
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公开(公告)号:US20220349059A1
公开(公告)日:2022-11-03
申请号:US17807920
申请日:2022-06-21
Applicant: ASM IP HOLDING B.V.
Inventor: Varun Sharma , Eva E. Tois
IPC: C23C16/455 , C23C16/44 , C23C16/18 , H01L23/31 , H01L21/02 , C23C16/02 , C23C16/04 , C23C16/40 , H01L21/321
Abstract: Passivation layers to inhibit vapor deposition can be used on reactor surfaces to minimize deposits while depositing on a substrate housed therein, or on particular substrate surfaces, such as metallic surfaces on semiconductor substrates to facilitate selective deposition on adjacent dielectric surfaces. Passivation agents that are smaller than typical self-assembled monolayer precursors can have hydrophobic or non-reactive ends and facilitate more dense passivation layers more quickly than self-assembled monolayers, particularly over complex three-dimensional structures.
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