公开(公告)号：US09232262B2

公开(公告)日：2016-01-05

申请号：US14557282

申请日：2014-12-01

Applicant: Maxlinear, Inc.

Inventor： Anand Anandakumar ,  Sheng Ye ,  Curtis Ling

IPC: G06F3/00 ,  H03K9/00 ,  H04N21/426 ,  H04N5/44 ,  H04N5/50 ,  H04N21/438 ,  H04N21/443 ,  H04N21/462 ,  H04N21/61

CPC classification number: H04N21/4263 ,  H04N5/44 ,  H04N5/50 ,  H04N21/4383 ,  H04N21/4436 ,  H04N21/4622 ,  H04N21/6143

Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband path (WB) and a narrowband path (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.

Abstract translation: 用于多路径视频和网络信道的方法和系统可以包括包括宽带路径（WB）和窄带路径（NB）的通信设备。 当设备在第一阶段中操作时，可以在WB中接收视频信道和网络信道。 在WB中可以接收视频信道和网络信道，并且当设备在第二阶段中操作时，也可以在NB中接收网络信道。 当设备在第三阶段中操作时，可以在NB中接收网络信道。 来自WB和NB的网络信道的接收可以在第一和第三阶段之间的转变中实现网络信道的连续接收。 WB可以用于接收多个信道，并且NB可以用于接收单个信道。

公开(公告)号：US20150135237A1

公开(公告)日：2015-05-14

申请号：US14557282

申请日：2014-12-01

Applicant: Maxlinear, Inc.

Inventor： Anand Anandakumar ,  Sheng Ye ,  Curtis Ling

IPC: H04N21/426 ,  H04N21/61 ,  H04N21/462

CPC classification number: H04N21/4263 ,  H04N5/44 ,  H04N5/50 ,  H04N21/4383 ,  H04N21/4436 ,  H04N21/4622 ,  H04N21/6143

Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband path (WB) and a narrowband path (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.

Abstract translation: 用于多路径视频和网络信道的方法和系统可以包括包括宽带路径（WB）和窄带路径（NB）的通信设备。 当设备在第一阶段中操作时，可以在WB中接收视频信道和网络信道。 在WB中可以接收视频信道和网络信道，并且当设备在第二阶段中操作时，也可以在NB中接收网络信道。 当设备在第三阶段中操作时，可以在NB中接收网络信道。 来自WB和NB的网络信道的接收可以在第一和第三阶段之间的转变中实现网络信道的连续接收。 WB可以用于接收多个信道，并且NB可以用于接收单个信道。

公开(公告)号：US20150048871A1

公开(公告)日：2015-02-19

申请号：US14452204

申请日：2014-08-05

Applicant: MaxLinear, Inc.

Inventor： Sheng Ye

IPC: H03L7/085 ,  H03L7/08

CPC classification number: H03L7/093 ,  H03L7/08 ,  H03L7/085 ,  H03L7/0891 ,  H03L7/18 ,  H03L2207/10

Abstract: A phase locked loop may be operable to generate, utilizing a frequency doubler, a reference clock signal whose frequency is twice a frequency of a crystal clock signal and is keyed on both rising and falling edges of the crystal clock signal. The phase locked loop may enable usage of both rising and falling edges of the crystal clock signal, based on the generated reference clock signal. The phase locked loop may perform an operation of the phase locked loop based on the enabling. The phase locked loop may perform a phase comparison function, based on both rising and falling edges of the crystal clock signal. By utilizing a sampled loop filter in the phase locked loop, the phase locked loop may eliminate, at an output of a charge pump in the phase locked loop, disturbance which is associated with duty cycle errors of the crystal clock signal.

Abstract translation: 锁相环可以用于利用倍频器产生频率为晶体时钟信号频率的两倍的参考时钟信号，并被键入晶体时钟信号的上升沿和下降沿。 基于生成的参考时钟信号，锁相环可以使得能够使用晶体时钟信号的上升沿和下降沿。 锁相环可以基于使能来执行锁相环的操作。 基于晶体时钟信号的上升沿和下降沿，锁相环可执行相位比较功能。 通过在锁相环中利用采样环路滤波器，锁相环可以在锁相环中的电荷泵的输出处消除与晶体时钟信号的占空比误差相关的干扰。

公开(公告)号：US20140155009A1

公开(公告)日：2014-06-05

申请号：US14174782

申请日：2014-02-06

Applicant: MaxLinear, Inc.

Inventor： Sheng Ye

IPC: H04B1/10

CPC classification number: H04B1/10 ,  H03L7/16 ,  H04B1/109

Abstract: A circuit includes, in part, a receiver, a received signal strength indicator (RSSI), and an oscillator. The receiver receives an incoming signal and an oscillating signal. The RSSI is responsive to the receiver and generates an output signal representative of the strength of the incoming signal. The oscillator receives different biasing conditions in response to different outputs of the RSSI. The oscillator generates the oscillating signal received by the receiver. The oscillator receives a first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value and a second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value. The first biasing condition may be defined by a first current, and the second biasing condition may be defined by a sum of the first current and a second current.

Abstract translation: 电路部分包括接收器，接收信号强度指示器（RSSI）和振荡器。 接收器接收输入信号和振荡信号。 RSSI响应于接收器并产生表示输入信号的强度的输出信号。 响应于RSSI的不同输出，振荡器接收不同的偏置条件。 振荡器产生由接收机接收的振荡信号。 当输入信号被检测为具有低于或等于预定阈值的强度时，振荡器接收第一偏置状态，并且当输入信号被检测为具有高于预定阈值的强度时，振荡器接收第一偏置状态。 第一偏置条件可以由第一电流限定，并且第二偏置条件可以由第一电流和第二电流的和来定义。