SEMICONDUCTOR DEVICE
    82.
    发明申请

    公开(公告)号:US20200266095A1

    公开(公告)日:2020-08-20

    申请号:US16866360

    申请日:2020-05-04

    Abstract: A structure of semiconductor device includes a substrate, having a dielectric layer on top. The structure further includes at least two metal elements being adjacent, disposed in the dielectric layer, wherein an air gap is existing between the two metal elements. A porous dielectric layer is disposed over the substrate, sealing the air gap. An inter-layer dielectric layer disposed on the porous dielectric layer.

    INTERCONNECTION STRUCTURE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20200258771A1

    公开(公告)日:2020-08-13

    申请号:US16858698

    申请日:2020-04-26

    Abstract: A method of forming an interconnection structure is disclosed, including providing a substrate, forming a patterned layer on the substrate, the patterned layer comprising at least a trench formed therein, depositing a first dielectric layer on the patterned layer and sealing an air gap in the trench, depositing a second dielectric layer on the first dielectric layer and completely covering the patterned layer, and performing a curing process to the first dielectric layer and the second dielectric layer.

    SEMICONDUCTOR DEVICE AND METHOD TO FABRICATE THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20200185325A1

    公开(公告)日:2020-06-11

    申请号:US16212401

    申请日:2018-12-06

    Abstract: A structure of semiconductor device includes a substrate, having a dielectric layer on top. At least two metal elements are formed in the dielectric layer, wherein an air gap is between adjacent two of the metal elements. A cap layer is disposed over the substrate, wherein a portion of the cap layer above the adjacent two of the metal elements has a hydrophilic surface. An inter-layer dielectric layer is disposed on the cap layer. The inter-layer dielectric layer seals the air gap between the two metal elements. The air gap remains and extends higher than a top surface of the metal elements.

    Semiconductor structure and process thereof

    公开(公告)号:US10186453B2

    公开(公告)日:2019-01-22

    申请号:US14738943

    申请日:2015-06-15

    Abstract: A semiconductor process includes the following steps. Metal patterns are formed on a first dielectric layer. A modifiable layer is formed to cover the metal patterns and the first dielectric layer. A modification process is performed to modify a part of the modifiable layer on top sides of the metal patterns, thereby top masks being formed. A removing process is performed to remove a part of the modifiable layer on sidewalls of the metal patterns but preserve the top masks. A dielectric layer having voids under the top masks and between the metal patterns is formed. Moreover, the present invention also provides a semiconductor structure formed by said semiconductor process.

    Method of forming opening pattern
    88.
    发明授权

    公开(公告)号:US09917007B2

    公开(公告)日:2018-03-13

    申请号:US15188621

    申请日:2016-06-21

    Abstract: A method of forming an opening pattern including the following steps is provided. An ultra low dielectric constant layer, a dielectric hard mask layer and a patterned metal hard mask layer are sequentially formed on a substrate. A portion of the dielectric hard mask layer is removed to form a patterned dielectric hard mask layer by using the patterned metal hard mask layer as a mask. The patterned metal hard mask layer is removed after forming the patterned dielectric hard mask layer. A portion of the ultra low dielectric constant layer is removed to form a first opening by using the patterned dielectric hard mask layer as a mask.

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20250112184A1

    公开(公告)日:2025-04-03

    申请号:US18979653

    申请日:2024-12-13

    Abstract: A semiconductor device includes an aluminum (Al) pad on a substrate, a wire bonded onto the Al pad, a cobalt (Co) layer between and directly contacting the Al pad and the wire, and a Co—Pd alloy on the Al pad and divide the Co layer into a first portion, a second portion, and a third portion. Preferably, the wire includes a copper (Cu) wire and a palladium (Pd) layer coated on the Cu wire.

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