公开(公告)号：US08715839B2

公开(公告)日：2014-05-06

申请号：US11479159

申请日：2006-06-30

Applicant: L. Pierre de Rochemont

Inventor： L. Pierre de Rochemont

IPC: B32B9/00 ,  B32B19/00 ,  H01L27/108 ,  H01L29/94 ,  H01C10/10 ,  H01F5/00

CPC classification number: H01Q9/0414 ,  B82Y30/00 ,  C04B2235/768 ,  C04B2235/781 ,  H01C7/003 ,  H01C17/003 ,  H01C17/06533 ,  H01G4/10 ,  H01G4/1209 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/642 ,  H01L23/647 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01025 ,  H01L2924/01037 ,  H01L2924/01057 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q15/0086 ,  H05K1/0298 ,  H05K1/092 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/207 ,  H05K2201/017 ,  H05K2201/0175 ,  H05K2201/09763 ,  H05K2203/016 ,  H05K2203/0338 ,  H05K2203/121 ,  Y10T428/12493

Abstract: An electrical component provides a ceramic element located on or in a dielectric substrate between and in contact with a pair of electrical conductors, wherein the ceramic element includes one or more metal oxides having fluctuations in metal-oxide compositional uniformity less than or equal to 1.5 mol % throughout the ceramic element. A method of fabricating an electrical component, provides or forming a ceramic element between and in contact with a pair of electrical conductors on a substrate including depositing a mixture of metalorganic precursors and causing simultaneous decomposition of the metal oxide precursors to form the ceramic element including one or more metal oxides.

Abstract translation: 电气部件提供位于电介质基板上或介质基板之间的陶瓷元件，其与一对电导体接触并接触，其中陶瓷元件包括一种或多种具有小于或等于1.5摩尔的金属 - 氧化物组成均匀性波动的金属氧化物 ％整个陶瓷元件。 一种制造电气部件的方法，在衬底上提供或形成与一对电导体接触的陶瓷元件，包括沉积金属有机前体的混合物并引起金属氧化物前体的同时分解以形成陶瓷元件，包括一个 或更多的金属氧化物。

公开(公告)号：US20130306885A1

公开(公告)日：2013-11-21

申请号：US13471854

申请日：2012-05-15

Applicant: Richard C. Blish ,  Timothy Z. Hossain

Inventor： Richard C. Blish ,  Timothy Z. Hossain

IPC: G21F3/00 ,  H05K13/04 ,  B05D5/00

CPC classification number: G21F1/10 ,  G21F1/085 ,  H01L23/3192 ,  H01L23/556 ,  H01L2924/0002 ,  H05K3/28 ,  H05K2201/017 ,  H01L2924/00

Abstract: An assembly includes an integrated circuit, a film layer disposed over the integrated circuit and having a thickness of at least 50 microns, and a thermal neutron absorber layer comprising at least 0.5% thermal neutron absorber. The thermal neutron absorber layer can be a glass layer or can include a molding compound.

Abstract translation: 组件包括集成电路，设置在集成电路上并具有至少50微米厚度的薄膜层和包含至少0.5％的热中子吸收体的热中子吸收层。 热中子吸收剂层可以是玻璃层，也可以包括模塑料。

公开(公告)号：US20130286607A1

公开(公告)日：2013-10-31

申请号：US13871128

申请日：2013-04-26

Applicant: Shinji Teraoka ,  Toshiyuki Tsuchiya ,  Nobuyuki Shimizu

Inventor： Shinji Teraoka ,  Toshiyuki Tsuchiya ,  Nobuyuki Shimizu

IPC: H05K1/02 ,  H05K3/46

CPC classification number: H05K1/0298 ,  F21S41/17 ,  H01L2224/48091 ,  H01L2224/73265 ,  H05K1/0209 ,  H05K1/0265 ,  H05K1/167 ,  H05K3/0061 ,  H05K3/28 ,  H05K3/4061 ,  H05K3/46 ,  H05K2201/017 ,  H05K2201/0175 ,  H05K2201/09563 ,  H05K2201/10113 ,  H05K2203/1563 ,  H05K2203/1572 ,  H05K2203/159 ,  Y10T29/49165 ,  H01L2924/00014

Abstract: A circuit board includes an insulative substrate having a first surface on which an electronic component is mounted, a second surface opposite to the first surface, and a through-hole open in the first surface and the second surface, a first conductive layer formed on the first surface so as to reach the through-hole, to which the electronic component is electrically connected, a second conductive layer formed on the second surface so as to reach the through-hole and electrically connected to the first conductive layer through the through-hole, a third conductive layer formed over the second surface so as to reach the through-hole, covering at least part of the second conductive layer, and filling at least part of the through-hole, a first protective glass layer covering the second conductive layer and the third conductive layer, and an adhesive layer formed on the first protective glass layer.

Abstract translation: 电路板包括具有安装有电子部件的第一表面的绝缘基板，与第一表面相对的第二表面和在第一表面和第二表面上开口的通孔，形成在第一表面上的第一导电层 第一表面，以到达电子部件电连接的通孔，形成在第二表面上的第二导电层，以便到达通孔并且通过通孔电连接到第一导电层 形成在所述第二表面上以便到达所述通孔的第三导电层，覆盖所述第二导电层的至少一部分，并填充所述通孔的至少一部分;覆盖所述第二导电层的第一保护玻璃层 和第三导电层，以及形成在第一保护玻璃层上的粘合剂层。

公开(公告)号：US20130161662A1

公开(公告)日：2013-06-27

申请号：US13726986

申请日：2012-12-26

Applicant: CITIZEN ELECTRONICS CO., LTD. ,  CITIZEN HOLDINGS CO., LTD.

Inventor： Sadato IMAI

IPC: H01L33/48 ,  H01L33/08

CPC classification number: H01L33/48 ,  H01L25/0753 ,  H01L33/08 ,  H01L33/644 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/181 ,  H05K1/053 ,  H05K2201/017 ,  H05K2201/10106 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: In a first aspect of the present invention, a lighting device including a metal plate, an electrical insulation layer that is smaller in size than an outline of the metal plate and arranged on an upper surface of the metal plate, a light-emitting element mounted on the electrical insulation layer, and a first connecting electrode and a second connecting electrode electrically connected to the light-emitting element and arranged on the electrical insulation layer.

Abstract translation: 在本发明的第一方面中，一种照明装置，包括金属板，电绝缘层，该电绝缘层的尺寸小于金属板的轮廓并布置在金属板的上表面上，发光元件安装 以及电连接到所述发光元件并且布置在所述电绝缘层上的第一连接电极和第二连接电极。

公开(公告)号：US08350657B2

公开(公告)日：2013-01-08

申请号：US11620042

申请日：2007-01-04

Applicant: L. Pierre deRochemont

Inventor： L. Pierre deRochemont

IPC: H01F5/00 ,  H01F27/28

CPC classification number: H01F27/2804 ,  B82Y30/00 ,  C04B2235/768 ,  C04B2235/781 ,  H01C7/003 ,  H01C17/003 ,  H01C17/06533 ,  H01F3/00 ,  H01F5/003 ,  H01F27/24 ,  H01F27/29 ,  H01F27/40 ,  H01F41/041 ,  H01F2027/2809 ,  H01G4/10 ,  H01G4/33 ,  H01L23/64 ,  H01L28/10 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01025 ,  H01L2924/01037 ,  H01L2924/01057 ,  H01L2924/01067 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0298 ,  H05K1/092 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/207 ,  H05K2201/017 ,  H05K2201/0175 ,  H05K2201/09763 ,  H05K2203/016 ,  H05K2203/0338 ,  H05K2203/121 ,  Y10T29/49021

Abstract: A power management module, provides an inductor including one or more electrical conductors disposed around a ferromagnetic ceramic element including one or more metal oxides having fluctuations in metal-oxide compositional uniformity less than or equal to 1.50 mol % throughout the ceramic element.

Abstract translation: 电源管理模块提供一种电感器，其包括设置在铁磁性陶瓷元件周围的一个或多个电导体，所述铁磁陶瓷元件包括在整个陶瓷元件中具有小于或等于1.50摩尔％的金属氧化物组成均匀性波动的一种或多种金属氧化物。

公开(公告)号：US20120113650A1

公开(公告)日：2012-05-10

申请号：US12943304

申请日：2010-11-10

Applicant: Sanjuro Inoue

Inventor： Sanjuro Inoue

IPC: F21V7/22 ,  C03C8/20 ,  B05D5/06 ,  F21V7/00

CPC classification number: C03C8/20 ,  C03C4/16 ,  C03C8/04 ,  C04B41/009 ,  C04B41/5022 ,  C04B41/86 ,  C04B2111/80 ,  H01L33/60 ,  H05K1/0306 ,  H05K2201/017 ,  H05K2201/10106 ,  H05K2201/2054 ,  C04B35/10 ,  C04B35/185 ,  C04B35/48 ,  C04B35/565 ,  C04B35/581 ,  C04B35/584 ,  C04B41/4539 ,  C04B41/4572 ,  C04B41/5042

Abstract: An insulating white glass paste suitable for forming an insulating reflective layer to be provided on a lighting device substrate, comprising an organic medium and inorganic components comprising glass frit and zirconia powder as a light-reflecting filler.

Abstract translation: 一种适用于形成设置在照明装置基板上的绝缘反射层的绝缘白色玻璃浆料，包括有机介质和包含玻璃料和氧化锆粉末的无机组分作为光反射填料。

公开(公告)号：US07888187B2

公开(公告)日：2011-02-15

申请号：US11791595

申请日：2005-11-18

Applicant: Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

Inventor： Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

IPC: H01L21/50 ,  H01L23/06

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/017 ,  H01L2924/00

Abstract: An element-mounting substrate includes a ceramic substrate, an electrode layer formed on the substrate and a ceramic coating layer which is formed on a part of the electrode layer and has a thickness of 5 to 50 μm. A process for producing the element-mounting substrate includes the steps of forming an electrode precursor layer in the shape of a pattern of an electrode layer on a ceramic plate or a green sheet of a large diameter, forming a ceramic coating precursor layer on a part of the electrode precursor layer and then firing the resulting precursor. In this process, it is preferable to form the ceramic coating layer so as to cover the electrode layer on a predetermined cutting line of the firing product. According to the element-mounting substrate in which a part of the electrode layer is covered with a ceramic, a failure in mounting an element attributable to the thickness of the ceramic coating layer can be prevented when the element is mounted. In addition, peeling or cracking of the electrode layer caused by impact during dicing can be prevented.

Abstract translation: 元件安装衬底包括陶瓷衬底，形成在衬底上的电极层和形成在电极层的一部分上并具有5至50μm厚度的陶瓷涂层。 一种用于制造元件安装基板的方法包括以下步骤：在陶瓷板或大直径的生片上形成电极层图案形状的电极前体层，在部件上形成陶瓷涂层前体层 的电极前体层，然后烧结所得的前体。 在该方法中，优选形成陶瓷被覆层，以覆盖烧制品的规定切断线上的电极层。 根据其中电极层的一部分被陶瓷覆盖的元件安装基板，当安装元件时，可以防止由于陶瓷涂层的厚度而导致的元件的安装失败。 此外，可以防止由切割期间的冲击引起的电极层的剥离或破裂。

公开(公告)号：US20100230149A1

公开(公告)日：2010-09-16

申请号：US12301791

申请日：2006-06-15

Applicant: William Borland ,  Seigi Suh ,  Jon-Paul Maria ,  Jon Fredrick Ihlefeld ,  Ian Burn

Inventor： William Borland ,  Seigi Suh ,  Jon-Paul Maria ,  Jon Fredrick Ihlefeld ,  Ian Burn

IPC: H05K1/16 ,  B05D5/12 ,  H01G4/06

CPC classification number: H01L21/31691 ,  C23C18/1212 ,  C23C18/1241 ,  C23C18/1266 ,  C23C18/1283 ,  C23C18/1295 ,  H01G4/129 ,  H05K1/162 ,  H05K2201/017 ,  H05K2201/0355

Abstract: A method of making dense dielectrics layers via chemical solution deposition by adding inorganic glass fluxed material to high dielectric constant compositions, depositing the resultant mixture onto a substrate and annealing the substrate at temperatures between the softening point of the inorganic glass flux and the melting point of the substrate. A method of making a capacitor comprising a dense dielectric layer.

Abstract translation: 一种通过在高介电常数组合物中添加无机玻璃助熔材料，通过化学溶液沉积制造致密电介质层的方法，将所得混合物沉积在基材上，并在无机玻璃熔剂的软化点和熔点之间的温度 底物。 一种制造包括致密介电层的电容器的方法。

公开(公告)号：US07781258B2

公开(公告)日：2010-08-24

申请号：US12320028

申请日：2009-01-15

Applicant: Susumu Toba ,  Akira Morozumi ,  Kazuo Furihata

Inventor： Susumu Toba ,  Akira Morozumi ,  Kazuo Furihata

IPC: H01L21/44

CPC classification number: H05K3/0061 ,  H01L23/373 ,  H01L23/3735 ,  H01L23/5385 ,  H01L25/072 ,  H01L2924/0002 ,  H05K1/142 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/017 ,  H05K2201/0323 ,  H05K2203/0545 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes the steps of bonding a semiconductor chip to a first side of a circuit board, bonding a metal base for dissipating heat produced by the semiconductor chip to a second side of the circuit board, and forming a dam on the metal base by a dam material so as to restrict flow of a solder used in bonding a plurality of the circuit boards to the metal base.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：将半导体芯片接合到电路板的第一侧，将用于将由半导体芯片产生的热量散发到电路板的第二侧的金属基底接合，并形成坝 所述金属基底由坝材料限制，以便限制用于将多个电路板接合到金属基底的焊料的流动。

公开(公告)号：US20090061178A1

公开(公告)日：2009-03-05

申请号：US12266574

申请日：2008-11-07

Applicant: Yasutaka Sugimoto

Inventor： Yasutaka Sugimoto

IPC: B32B3/00 ,  B32B37/02

CPC classification number: H05K1/111 ,  C03C14/004 ,  H05K1/0306 ,  H05K3/285 ,  H05K3/4614 ,  H05K3/4629 ,  H05K2201/017 ,  H05K2201/068 ,  H05K2201/09481 ,  H05K2201/099 ,  Y02P70/611 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A multilayer ceramic substrate includes an inner layer portion and surface portions that sandwich the inner layer portion in the stacking direction and have an increased transverse strength because of the surface layer portion having a thermal expansion coefficient less than that of the inner layer portion. At least one of the surface portions covers peripheries of main-surface conductive films arranged on a main surface of an inner portion so as to leave central portions of the main-surface conductive films exposed, so that the main-surface conductive films function as via conductors, thereby eliminating the need to provide a via conductor in the surface portions.