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    Non-volatile semiconductor memory device and method of manufacturing the same
    2.
    发明授权
    Non-volatile semiconductor memory device and method of manufacturing the same 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US07785964B2

    公开(公告)日：2010-08-31

    申请号：US12078406

    申请日：2008-03-31

    Applicant: Jin-Jun Park ,  Hee-Jin Kwak ,  Beom-Jun Jin

    Inventor： Jin-Jun Park ,  Hee-Jin Kwak ,  Beom-Jun Jin

    IPC: H01L21/336

    CPC classification number: H01L21/28273 ,  H01L27/115 ,  H01L29/66825

    Abstract: Example embodiments relate to a non-volatile semiconductor memory device and a method of manufacturing the same. A semiconductor device includes an isolation layer protruding from a substrate, a spacer, a tunnel insulation layer, a floating gate, a dielectric layer pattern and a control gate. The spacer may be formed on a sidewall of a protruding portion of the isolation layer. The tunnel insulation layer may be formed on the substrate between adjacent isolation layers. The floating gate may be formed on the tunnel insulation layer. The floating gate contacts the spacer and has a width that gradually increases from a lower portion toward an upper portion. The dielectric layer pattern and the control gate may be sequentially formed on the floating gate.

    Abstract translation: 示例性实施例涉及非易失性半导体存储器件及其制造方法。 半导体器件包括从衬底突出的隔离层，间隔物，隧道绝缘层，浮动栅极，电介质层图案和控制栅极。 间隔件可以形成在隔离层的突出部分的侧壁上。 隧道绝缘层可以形成在相邻隔离层之间的衬底上。 浮栅可以形成在隧道绝缘层上。 浮动栅极接触间隔件，并且具有从下部朝向上部逐渐增加的宽度。 电介质层图案和控制栅极可以顺序地形成在浮动栅极上。

    Methods of forming a thin layer including hafnium silicon oxide using atomic layer deposition and methods of forming a gate structure and a capacitor including the same
    4.
    发明申请
    Methods of forming a thin layer including hafnium silicon oxide using atomic layer deposition and methods of forming a gate structure and a capacitor including the same 审中-公开
    使用原子层沉积形成包括氧化铪的薄层的方法和形成栅极结构的方法和包括其的电容器的方法

    公开(公告)号：US20060019501A1

    公开(公告)日：2006-01-26

    申请号：US11180121

    申请日：2005-07-13

    Applicant: Beom-Jun Jin ,  Hong-Bae Park ,  Sang-Bom Kang ,  Yu-Gyun Shin

    Inventor： Beom-Jun Jin ,  Hong-Bae Park ,  Sang-Bom Kang ,  Yu-Gyun Shin

    IPC: H01L21/44 ,  H01L21/31 ,  H01L21/26

    CPC classification number: H01L21/02148 ,  C23C16/401 ,  C23C16/45531 ,  H01L21/02208 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31608 ,  H01L21/31645 ,  H01L29/517

    Abstract: Methods of forming a thin film include applying a first reactant to a substrate, chemisorbing a first portion of the first reactant and physisorbing a second portion of the first reactant on the substrate, applying a first oxidizer to the substrate, chemically reacting the first oxidizer with the first portion of the first reactant to form a first solid material on the substrate, applying a second reactant to the first solid material, chemisorbing a first portion of the second reactant and physisorbing a second portion of the second reactant on the first solid material, applying a second oxidizer to the first solid material; and chemically reacting the second oxidizer with the first portion of the second reactant to form a second solid material on the first solid material.

    Abstract translation: 形成薄膜的方法包括将第一反应物施加到基底，化学吸收第一反应物的第一部分并在基底上吸附第一反应物的第二部分，将第一氧化剂施加到基底上，使第一氧化剂与 所述第一反应物的第一部分在所述基底上形成第一固体材料，向所述第一固体材料施加第二反应物，化学吸附所述第二反应物的第一部分并在所述第一固体材料上吸附所述第二反应物的第二部分， 将第二氧化剂施加到所述第一固体材料; 以及使所述第二氧化剂与所述第二反应物的第一部分化学反应以在所述第一固体材料上形成第二固体材料。

    Semiconductor memory device having multi-layered storage node contact plug and method for fabricating the same
    5.
    发明授权
    Semiconductor memory device having multi-layered storage node contact plug and method for fabricating the same 有权
    具有多层存储节点接触插塞的半导体存储器件及其制造方法

    公开(公告)号：US06984568B2

    公开(公告)日：2006-01-10

    申请号：US10685569

    申请日：2003-10-16

    Applicant: Beom-jun Jin ,  Byeong-yun Nam

    Inventor： Beom-jun Jin ,  Byeong-yun Nam

    IPC: H01L21/20

    CPC classification number: H01L27/10855 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485 ,  H01L27/10885 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor memory device includes a bit line stack and a storage node contact hole which are aligned at bit line spacers formed at both side walls of the bit line stack and exposes a pad. The semiconductor memory device includes a multi-layered storage node contact plug in which a first storage node contact plug and a second storage node contact plug are sequentially formed. The first storage node contact plug is formed of titanium nitride and the second storage node contact plug is formed of polysilicon. An ohmic layer may be formed on the pad and under the first storage node contact plug. A barrier metal layer, which acts as a third storage node contact plug, may be formed on the second storage node contact plug.

    Abstract translation: 半导体存储器件包括位线堆叠和存储节点接触孔，它们位于形成在位线堆叠的两个侧壁处的位线间隔件处并且暴露焊盘。 半导体存储器件包括多层存储节点接触插头，其中依次形成第一存储节点接触插头和第二存储节点接触插头。 第一存储节点接触插塞由氮化钛形成，第二存储节点接触插塞由多晶硅形成。 可以在焊盘上和第一存储节点接触插头下方形成欧姆层。 作为第三存储节点接触插头的阻挡金属层可以形成在第二存储节点接触插头上。

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